UnbalancedCat/simple-risc-v32i-cpu
Archived
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Initial

Browse Source
This commit is contained in:
包焕垲
2023-02-28 09:10:42 +08:00
commit a657a360bf
68 changed files with 5025 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
.gitignore vendored Normal file
View File

@@ -0,0 +1,13 @@
#Vivado generated files
/.Xil/
/*.cache/
/*.gen/
/*.hw/
/*.ip_user_files/
/*.runs/
/*.sim/
#Customed files
/*.log
/*.jou
/*.zip

0
README.md Normal file
View File

255
cpu_rv32i.srcs/constrs_1/imports/Vivado/Nexys4DDR.xdc Normal file
View File

@@ -0,0 +1,255 @@
## This file is a general .xdc for the Nexys4 DDR Rev. C
## To use it in a project:
## - uncomment the lines corresponding to used pins
## - rename the used ports (in each line, after get_ports) according to the top level signal names in the project
## Clock signal
set_property -dict {PACKAGE_PIN E3 IOSTANDARD LVCMOS33} [get_ports clk]
create_clock -period 10.000 -name sys_clk_pin -waveform {0.000 5.000} -add [get_ports clk]
##Switches
set_property -dict { PACKAGE_PIN J15 IOSTANDARD LVCMOS33 } [get_ports { switch[0] }]; #IO_L24N_T3_RS0_15 Sch=sw[0]
set_property -dict { PACKAGE_PIN L16 IOSTANDARD LVCMOS33 } [get_ports { switch[1] }]; #IO_L6N_T0_D08_VREF_14 Sch=sw[1]
set_property -dict { PACKAGE_PIN M13 IOSTANDARD LVCMOS33 } [get_ports { switch[2] }]; #IO_L6N_T0_D08_VREF_14 Sch=sw[2]
set_property -dict { PACKAGE_PIN R15 IOSTANDARD LVCMOS33 } [get_ports { switch[3] }]; #IO_L13N_T2_MRCC_14 Sch=sw[3]
set_property -dict { PACKAGE_PIN R17 IOSTANDARD LVCMOS33 } [get_ports { switch[4] }]; #IO_L12N_T1_MRCC_14 Sch=sw[4]
#set_property -dict { PACKAGE_PIN T18 IOSTANDARD LVCMOS33 } [get_ports { SW[5] }]; #IO_L7N_T1_D10_14 Sch=sw[5]
#set_property -dict { PACKAGE_PIN U18 IOSTANDARD LVCMOS33 } [get_ports { SW[6] }]; #IO_L17N_T2_A13_D29_14 Sch=sw[6]
#set_property -dict { PACKAGE_PIN R13 IOSTANDARD LVCMOS33 } [get_ports { SW[7] }]; #IO_L5N_T0_D07_14 Sch=sw[7]
#set_property -dict { PACKAGE_PIN T8 IOSTANDARD LVCMOS18 } [get_ports { SW[8] }]; #IO_L24N_T3_34 Sch=sw[8]
#set_property -dict { PACKAGE_PIN U8 IOSTANDARD LVCMOS18 } [get_ports { SW[9] }]; #IO_25_34 Sch=sw[9]
#set_property -dict { PACKAGE_PIN R16 IOSTANDARD LVCMOS33 } [get_ports { SW[10] }]; #IO_L15P_T2_DQS_RDWR_B_14 Sch=sw[10]
#set_property -dict { PACKAGE_PIN T13 IOSTANDARD LVCMOS33 } [get_ports { SW[11] }]; #IO_L23P_T3_A03_D19_14 Sch=sw[11]
#set_property -dict { PACKAGE_PIN H6 IOSTANDARD LVCMOS33 } [get_ports { SW[12] }]; #IO_L24P_T3_35 Sch=sw[12]
#set_property -dict { PACKAGE_PIN U12 IOSTANDARD LVCMOS33 } [get_ports { SW[13] }]; #IO_L20P_T3_A08_D24_14 Sch=sw[13]
#set_property -dict { PACKAGE_PIN U11 IOSTANDARD LVCMOS33 } [get_ports { SW[14] }]; #IO_L19N_T3_A09_D25_VREF_14 Sch=sw[14]
#set_property -dict { PACKAGE_PIN V10 IOSTANDARD LVCMOS33 } [get_ports { SW[15] }]; #IO_L21P_T3_DQS_14 Sch=sw[15]
## LEDs
set_property -dict { PACKAGE_PIN H17 IOSTANDARD LVCMOS33 } [get_ports { led[0] }]; #IO_L18P_T2_A24_15 Sch=led[0]
set_property -dict { PACKAGE_PIN K15 IOSTANDARD LVCMOS33 } [get_ports { led[1] }]; #IO_L24P_T3_RS1_15 Sch=led[1]
set_property -dict { PACKAGE_PIN J13 IOSTANDARD LVCMOS33 } [get_ports { led[2] }]; #IO_L17N_T2_A25_15 Sch=led[2]
set_property -dict { PACKAGE_PIN N14 IOSTANDARD LVCMOS33 } [get_ports { led[3] }]; #IO_L8P_T1_D11_14 Sch=led[3]
set_property -dict { PACKAGE_PIN R18 IOSTANDARD LVCMOS33 } [get_ports { led[4] }]; #IO_L7P_T1_D09_14 Sch=led[4]
set_property -dict { PACKAGE_PIN V17 IOSTANDARD LVCMOS33 } [get_ports { led[5] }]; #IO_L18N_T2_A11_D27_14 Sch=led[5]
set_property -dict { PACKAGE_PIN U17 IOSTANDARD LVCMOS33 } [get_ports { led[6] }]; #IO_L17P_T2_A14_D30_14 Sch=led[6]
set_property -dict { PACKAGE_PIN U16 IOSTANDARD LVCMOS33 } [get_ports { led[7] }]; #IO_L18P_T2_A12_D28_14 Sch=led[7]
set_property -dict { PACKAGE_PIN V16 IOSTANDARD LVCMOS33 } [get_ports { led[8] }]; #IO_L16N_T2_A15_D31_14 Sch=led[8]
set_property -dict { PACKAGE_PIN T15 IOSTANDARD LVCMOS33 } [get_ports { led[9] }]; #IO_L14N_T2_SRCC_14 Sch=led[9]
set_property -dict { PACKAGE_PIN U14 IOSTANDARD LVCMOS33 } [get_ports { led[10] }]; #IO_L22P_T3_A05_D21_14 Sch=led[10]
set_property -dict { PACKAGE_PIN T16 IOSTANDARD LVCMOS33 } [get_ports { led[11] }]; #IO_L15N_T2_DQS_DOUT_CSO_B_14 Sch=led[11]
set_property -dict { PACKAGE_PIN V15 IOSTANDARD LVCMOS33 } [get_ports { led[12] }]; #IO_L16P_T2_CSI_B_14 Sch=led[12]
set_property -dict { PACKAGE_PIN V14 IOSTANDARD LVCMOS33 } [get_ports { led[13] }]; #IO_L22N_T3_A04_D20_14 Sch=led[13]
set_property -dict { PACKAGE_PIN V12 IOSTANDARD LVCMOS33 } [get_ports { led[14] }]; #IO_L20N_T3_A07_D23_14 Sch=led[14]
set_property -dict { PACKAGE_PIN V11 IOSTANDARD LVCMOS33 } [get_ports { led[15] }]; #IO_L21N_T3_DQS_A06_D22_14 Sch=led[15]
#set_property -dict { PACKAGE_PIN R12 IOSTANDARD LVCMOS33 } [get_ports { LED16_B }]; #IO_L5P_T0_D06_14 Sch=led16_b
#set_property -dict { PACKAGE_PIN M16 IOSTANDARD LVCMOS33 } [get_ports { LED16_G }]; #IO_L10P_T1_D14_14 Sch=led16_g
#set_property -dict { PACKAGE_PIN N15 IOSTANDARD LVCMOS33 } [get_ports { LED16_R }]; #IO_L11P_T1_SRCC_14 Sch=led16_r
#set_property -dict { PACKAGE_PIN G14 IOSTANDARD LVCMOS33 } [get_ports { LED17_B }]; #IO_L15N_T2_DQS_ADV_B_15 Sch=led17_b
#set_property -dict { PACKAGE_PIN R11 IOSTANDARD LVCMOS33 } [get_ports { LED17_G }]; #IO_0_14 Sch=led17_g
#set_property -dict { PACKAGE_PIN N16 IOSTANDARD LVCMOS33 } [get_ports { LED17_R }]; #IO_L11N_T1_SRCC_14 Sch=led17_r
##7 segment display
#set_property -dict { PACKAGE_PIN T10 IOSTANDARD LVCMOS33 } [get_ports { CA }]; #IO_L24N_T3_A00_D16_14 Sch=ca
#set_property -dict { PACKAGE_PIN R10 IOSTANDARD LVCMOS33 } [get_ports { CB }]; #IO_25_14 Sch=cb
#set_property -dict { PACKAGE_PIN K16 IOSTANDARD LVCMOS33 } [get_ports { CC }]; #IO_25_15 Sch=cc
#set_property -dict { PACKAGE_PIN K13 IOSTANDARD LVCMOS33 } [get_ports { CD }]; #IO_L17P_T2_A26_15 Sch=cd
#set_property -dict { PACKAGE_PIN P15 IOSTANDARD LVCMOS33 } [get_ports { CE }]; #IO_L13P_T2_MRCC_14 Sch=ce
#set_property -dict { PACKAGE_PIN T11 IOSTANDARD LVCMOS33 } [get_ports { CF }]; #IO_L19P_T3_A10_D26_14 Sch=cf
#set_property -dict { PACKAGE_PIN L18 IOSTANDARD LVCMOS33 } [get_ports { CG }]; #IO_L4P_T0_D04_14 Sch=cg
#set_property -dict { PACKAGE_PIN H15 IOSTANDARD LVCMOS33 } [get_ports { DP }]; #IO_L19N_T3_A21_VREF_15 Sch=dp
#set_property -dict { PACKAGE_PIN J17 IOSTANDARD LVCMOS33 } [get_ports { AN[0] }]; #IO_L23P_T3_FOE_B_15 Sch=an[0]
#set_property -dict { PACKAGE_PIN J18 IOSTANDARD LVCMOS33 } [get_ports { AN[1] }]; #IO_L23N_T3_FWE_B_15 Sch=an[1]
#set_property -dict { PACKAGE_PIN T9 IOSTANDARD LVCMOS33 } [get_ports { AN[2] }]; #IO_L24P_T3_A01_D17_14 Sch=an[2]
#set_property -dict { PACKAGE_PIN J14 IOSTANDARD LVCMOS33 } [get_ports { AN[3] }]; #IO_L19P_T3_A22_15 Sch=an[3]
#set_property -dict { PACKAGE_PIN P14 IOSTANDARD LVCMOS33 } [get_ports { AN[4] }]; #IO_L8N_T1_D12_14 Sch=an[4]
#set_property -dict { PACKAGE_PIN T14 IOSTANDARD LVCMOS33 } [get_ports { AN[5] }]; #IO_L14P_T2_SRCC_14 Sch=an[5]
#set_property -dict { PACKAGE_PIN K2 IOSTANDARD LVCMOS33 } [get_ports { AN[6] }]; #IO_L23P_T3_35 Sch=an[6]
#set_property -dict { PACKAGE_PIN U13 IOSTANDARD LVCMOS33 } [get_ports { AN[7] }]; #IO_L23N_T3_A02_D18_14 Sch=an[7]
##Buttons
set_property -dict {PACKAGE_PIN C12 IOSTANDARD LVCMOS33} [get_ports resetn]
#set_property -dict { PACKAGE_PIN N17 IOSTANDARD LVCMOS33 } [get_ports { BTNC }]; #IO_L9P_T1_DQS_14 Sch=btnc
#set_property -dict { PACKAGE_PIN M18 IOSTANDARD LVCMOS33 } [get_ports { BTNU }]; #IO_L4N_T0_D05_14 Sch=btnu
#set_property -dict { PACKAGE_PIN P17 IOSTANDARD LVCMOS33 } [get_ports { BTNL }]; #IO_L12P_T1_MRCC_14 Sch=btnl
#set_property -dict { PACKAGE_PIN M17 IOSTANDARD LVCMOS33 } [get_ports { BTNR }]; #IO_L10N_T1_D15_14 Sch=btnr
#set_property -dict { PACKAGE_PIN P18 IOSTANDARD LVCMOS33 } [get_ports { BTND }]; #IO_L9N_T1_DQS_D13_14 Sch=btnd
##Pmod Headers
##Pmod Header JA
#set_property -dict { PACKAGE_PIN C17 IOSTANDARD LVCMOS33 } [get_ports { JA[1] }]; #IO_L20N_T3_A19_15 Sch=ja[1]
#set_property -dict { PACKAGE_PIN D18 IOSTANDARD LVCMOS33 } [get_ports { JA[2] }]; #IO_L21N_T3_DQS_A18_15 Sch=ja[2]
#set_property -dict { PACKAGE_PIN E18 IOSTANDARD LVCMOS33 } [get_ports { JA[3] }]; #IO_L21P_T3_DQS_15 Sch=ja[3]
#set_property -dict { PACKAGE_PIN G17 IOSTANDARD LVCMOS33 } [get_ports { JA[4] }]; #IO_L18N_T2_A23_15 Sch=ja[4]
#set_property -dict { PACKAGE_PIN D17 IOSTANDARD LVCMOS33 } [get_ports { JA[7] }]; #IO_L16N_T2_A27_15 Sch=ja[7]
#set_property -dict { PACKAGE_PIN E17 IOSTANDARD LVCMOS33 } [get_ports { JA[8] }]; #IO_L16P_T2_A28_15 Sch=ja[8]
#set_property -dict { PACKAGE_PIN F18 IOSTANDARD LVCMOS33 } [get_ports { JA[9] }]; #IO_L22N_T3_A16_15 Sch=ja[9]
#set_property -dict { PACKAGE_PIN G18 IOSTANDARD LVCMOS33 } [get_ports { JA[10] }]; #IO_L22P_T3_A17_15 Sch=ja[10]
##Pmod Header JB
#set_property -dict { PACKAGE_PIN D14 IOSTANDARD LVCMOS33 } [get_ports { JB[1] }]; #IO_L1P_T0_AD0P_15 Sch=jb[1]
#set_property -dict { PACKAGE_PIN F16 IOSTANDARD LVCMOS33 } [get_ports { JB[2] }]; #IO_L14N_T2_SRCC_15 Sch=jb[2]
#set_property -dict { PACKAGE_PIN G16 IOSTANDARD LVCMOS33 } [get_ports { JB[3] }]; #IO_L13N_T2_MRCC_15 Sch=jb[3]
#set_property -dict { PACKAGE_PIN H14 IOSTANDARD LVCMOS33 } [get_ports { JB[4] }]; #IO_L15P_T2_DQS_15 Sch=jb[4]
#set_property -dict { PACKAGE_PIN E16 IOSTANDARD LVCMOS33 } [get_ports { JB[7] }]; #IO_L11N_T1_SRCC_15 Sch=jb[7]
#set_property -dict { PACKAGE_PIN F13 IOSTANDARD LVCMOS33 } [get_ports { JB[8] }]; #IO_L5P_T0_AD9P_15 Sch=jb[8]
#set_property -dict { PACKAGE_PIN G13 IOSTANDARD LVCMOS33 } [get_ports { JB[9] }]; #IO_0_15 Sch=jb[9]
#set_property -dict { PACKAGE_PIN H16 IOSTANDARD LVCMOS33 } [get_ports { JB[10] }]; #IO_L13P_T2_MRCC_15 Sch=jb[10]
##Pmod Header JC
#set_property -dict { PACKAGE_PIN K1 IOSTANDARD LVCMOS33 } [get_ports { JC[1] }]; #IO_L23N_T3_35 Sch=jc[1]
#set_property -dict { PACKAGE_PIN F6 IOSTANDARD LVCMOS33 } [get_ports { JC[2] }]; #IO_L19N_T3_VREF_35 Sch=jc[2]
#set_property -dict { PACKAGE_PIN J2 IOSTANDARD LVCMOS33 } [get_ports { JC[3] }]; #IO_L22N_T3_35 Sch=jc[3]
#set_property -dict { PACKAGE_PIN G6 IOSTANDARD LVCMOS33 } [get_ports { JC[4] }]; #IO_L19P_T3_35 Sch=jc[4]
#set_property -dict { PACKAGE_PIN E7 IOSTANDARD LVCMOS33 } [get_ports { JC[7] }]; #IO_L6P_T0_35 Sch=jc[7]
#set_property -dict { PACKAGE_PIN J3 IOSTANDARD LVCMOS33 } [get_ports { JC[8] }]; #IO_L22P_T3_35 Sch=jc[8]
#set_property -dict { PACKAGE_PIN J4 IOSTANDARD LVCMOS33 } [get_ports { JC[9] }]; #IO_L21P_T3_DQS_35 Sch=jc[9]
#set_property -dict { PACKAGE_PIN E6 IOSTANDARD LVCMOS33 } [get_ports { JC[10] }]; #IO_L5P_T0_AD13P_35 Sch=jc[10]
##Pmod Header JD
#set_property -dict { PACKAGE_PIN H4 IOSTANDARD LVCMOS33 } [get_ports { JD[1] }]; #IO_L21N_T3_DQS_35 Sch=jd[1]
#set_property -dict { PACKAGE_PIN H1 IOSTANDARD LVCMOS33 } [get_ports { JD[2] }]; #IO_L17P_T2_35 Sch=jd[2]
#set_property -dict { PACKAGE_PIN G1 IOSTANDARD LVCMOS33 } [get_ports { JD[3] }]; #IO_L17N_T2_35 Sch=jd[3]
#set_property -dict { PACKAGE_PIN G3 IOSTANDARD LVCMOS33 } [get_ports { JD[4] }]; #IO_L20N_T3_35 Sch=jd[4]
#set_property -dict { PACKAGE_PIN H2 IOSTANDARD LVCMOS33 } [get_ports { JD[7] }]; #IO_L15P_T2_DQS_35 Sch=jd[7]
#set_property -dict { PACKAGE_PIN G4 IOSTANDARD LVCMOS33 } [get_ports { JD[8] }]; #IO_L20P_T3_35 Sch=jd[8]
#set_property -dict { PACKAGE_PIN G2 IOSTANDARD LVCMOS33 } [get_ports { JD[9] }]; #IO_L15N_T2_DQS_35 Sch=jd[9]
#set_property -dict { PACKAGE_PIN F3 IOSTANDARD LVCMOS33 } [get_ports { JD[10] }]; #IO_L13N_T2_MRCC_35 Sch=jd[10]
##Pmod Header JXADC
#set_property -dict { PACKAGE_PIN A14 IOSTANDARD LVDS } [get_ports { XA_N[1] }]; #IO_L9N_T1_DQS_AD3N_15 Sch=xa_n[1]
#set_property -dict { PACKAGE_PIN A13 IOSTANDARD LVDS } [get_ports { XA_P[1] }]; #IO_L9P_T1_DQS_AD3P_15 Sch=xa_p[1]
#set_property -dict { PACKAGE_PIN A16 IOSTANDARD LVDS } [get_ports { XA_N[2] }]; #IO_L8N_T1_AD10N_15 Sch=xa_n[2]
#set_property -dict { PACKAGE_PIN A15 IOSTANDARD LVDS } [get_ports { XA_P[2] }]; #IO_L8P_T1_AD10P_15 Sch=xa_p[2]
#set_property -dict { PACKAGE_PIN B17 IOSTANDARD LVDS } [get_ports { XA_N[3] }]; #IO_L7N_T1_AD2N_15 Sch=xa_n[3]
#set_property -dict { PACKAGE_PIN B16 IOSTANDARD LVDS } [get_ports { XA_P[3] }]; #IO_L7P_T1_AD2P_15 Sch=xa_p[3]
#set_property -dict { PACKAGE_PIN A18 IOSTANDARD LVDS } [get_ports { XA_N[4] }]; #IO_L10N_T1_AD11N_15 Sch=xa_n[4]
#set_property -dict { PACKAGE_PIN B18 IOSTANDARD LVDS } [get_ports { XA_P[4] }]; #IO_L10P_T1_AD11P_15 Sch=xa_p[4]
##VGA Connector
#set_property -dict { PACKAGE_PIN A3 IOSTANDARD LVCMOS33 } [get_ports { VGA_R[0] }]; #IO_L8N_T1_AD14N_35 Sch=vga_r[0]
#set_property -dict { PACKAGE_PIN B4 IOSTANDARD LVCMOS33 } [get_ports { VGA_R[1] }]; #IO_L7N_T1_AD6N_35 Sch=vga_r[1]
#set_property -dict { PACKAGE_PIN C5 IOSTANDARD LVCMOS33 } [get_ports { VGA_R[2] }]; #IO_L1N_T0_AD4N_35 Sch=vga_r[2]
#set_property -dict { PACKAGE_PIN A4 IOSTANDARD LVCMOS33 } [get_ports { VGA_R[3] }]; #IO_L8P_T1_AD14P_35 Sch=vga_r[3]
#set_property -dict { PACKAGE_PIN C6 IOSTANDARD LVCMOS33 } [get_ports { VGA_G[0] }]; #IO_L1P_T0_AD4P_35 Sch=vga_g[0]
#set_property -dict { PACKAGE_PIN A5 IOSTANDARD LVCMOS33 } [get_ports { VGA_G[1] }]; #IO_L3N_T0_DQS_AD5N_35 Sch=vga_g[1]
#set_property -dict { PACKAGE_PIN B6 IOSTANDARD LVCMOS33 } [get_ports { VGA_G[2] }]; #IO_L2N_T0_AD12N_35 Sch=vga_g[2]
#set_property -dict { PACKAGE_PIN A6 IOSTANDARD LVCMOS33 } [get_ports { VGA_G[3] }]; #IO_L3P_T0_DQS_AD5P_35 Sch=vga_g[3]
#set_property -dict { PACKAGE_PIN B7 IOSTANDARD LVCMOS33 } [get_ports { VGA_B[0] }]; #IO_L2P_T0_AD12P_35 Sch=vga_b[0]
#set_property -dict { PACKAGE_PIN C7 IOSTANDARD LVCMOS33 } [get_ports { VGA_B[1] }]; #IO_L4N_T0_35 Sch=vga_b[1]
#set_property -dict { PACKAGE_PIN D7 IOSTANDARD LVCMOS33 } [get_ports { VGA_B[2] }]; #IO_L6N_T0_VREF_35 Sch=vga_b[2]
#set_property -dict { PACKAGE_PIN D8 IOSTANDARD LVCMOS33 } [get_ports { VGA_B[3] }]; #IO_L4P_T0_35 Sch=vga_b[3]
#set_property -dict { PACKAGE_PIN B11 IOSTANDARD LVCMOS33 } [get_ports { VGA_HS }]; #IO_L4P_T0_15 Sch=vga_hs
#set_property -dict { PACKAGE_PIN B12 IOSTANDARD LVCMOS33 } [get_ports { VGA_VS }]; #IO_L3N_T0_DQS_AD1N_15 Sch=vga_vs
##Micro SD Connector
#set_property -dict { PACKAGE_PIN E2 IOSTANDARD LVCMOS33 } [get_ports { SD_RESET }]; #IO_L14P_T2_SRCC_35 Sch=sd_reset
#set_property -dict { PACKAGE_PIN A1 IOSTANDARD LVCMOS33 } [get_ports { SD_CD }]; #IO_L9N_T1_DQS_AD7N_35 Sch=sd_cd
#set_property -dict { PACKAGE_PIN B1 IOSTANDARD LVCMOS33 } [get_ports { SD_SCK }]; #IO_L9P_T1_DQS_AD7P_35 Sch=sd_sck
#set_property -dict { PACKAGE_PIN C1 IOSTANDARD LVCMOS33 } [get_ports { SD_CMD }]; #IO_L16N_T2_35 Sch=sd_cmd
#set_property -dict { PACKAGE_PIN C2 IOSTANDARD LVCMOS33 } [get_ports { SD_DAT[0] }]; #IO_L16P_T2_35 Sch=sd_dat[0]
#set_property -dict { PACKAGE_PIN E1 IOSTANDARD LVCMOS33 } [get_ports { SD_DAT[1] }]; #IO_L18N_T2_35 Sch=sd_dat[1]
#set_property -dict { PACKAGE_PIN F1 IOSTANDARD LVCMOS33 } [get_ports { SD_DAT[2] }]; #IO_L18P_T2_35 Sch=sd_dat[2]
#set_property -dict { PACKAGE_PIN D2 IOSTANDARD LVCMOS33 } [get_ports { SD_DAT[3] }]; #IO_L14N_T2_SRCC_35 Sch=sd_dat[3]
##Accelerometer
#set_property -dict { PACKAGE_PIN E15 IOSTANDARD LVCMOS33 } [get_ports { ACL_MISO }]; #IO_L11P_T1_SRCC_15 Sch=acl_miso
#set_property -dict { PACKAGE_PIN F14 IOSTANDARD LVCMOS33 } [get_ports { ACL_MOSI }]; #IO_L5N_T0_AD9N_15 Sch=acl_mosi
#set_property -dict { PACKAGE_PIN F15 IOSTANDARD LVCMOS33 } [get_ports { ACL_SCLK }]; #IO_L14P_T2_SRCC_15 Sch=acl_sclk
#set_property -dict { PACKAGE_PIN D15 IOSTANDARD LVCMOS33 } [get_ports { ACL_CSN }]; #IO_L12P_T1_MRCC_15 Sch=acl_csn
#set_property -dict { PACKAGE_PIN B13 IOSTANDARD LVCMOS33 } [get_ports { ACL_INT[1] }]; #IO_L2P_T0_AD8P_15 Sch=acl_int[1]
#set_property -dict { PACKAGE_PIN C16 IOSTANDARD LVCMOS33 } [get_ports { ACL_INT[2] }]; #IO_L20P_T3_A20_15 Sch=acl_int[2]
##Temperature Sensor
#set_property -dict { PACKAGE_PIN C14 IOSTANDARD LVCMOS33 } [get_ports { TMP_SCL }]; #IO_L1N_T0_AD0N_15 Sch=tmp_scl
#set_property -dict { PACKAGE_PIN C15 IOSTANDARD LVCMOS33 } [get_ports { TMP_SDA }]; #IO_L12N_T1_MRCC_15 Sch=tmp_sda
#set_property -dict { PACKAGE_PIN D13 IOSTANDARD LVCMOS33 } [get_ports { TMP_INT }]; #IO_L6N_T0_VREF_15 Sch=tmp_int
#set_property -dict { PACKAGE_PIN B14 IOSTANDARD LVCMOS33 } [get_ports { TMP_CT }]; #IO_L2N_T0_AD8N_15 Sch=tmp_ct
##Omnidirectional Microphone
#set_property -dict { PACKAGE_PIN J5 IOSTANDARD LVCMOS33 } [get_ports { M_CLK }]; #IO_25_35 Sch=m_clk
#set_property -dict { PACKAGE_PIN H5 IOSTANDARD LVCMOS33 } [get_ports { M_DATA }]; #IO_L24N_T3_35 Sch=m_data
#set_property -dict { PACKAGE_PIN F5 IOSTANDARD LVCMOS33 } [get_ports { M_LRSEL }]; #IO_0_35 Sch=m_lrsel
##PWM Audio Amplifier
#set_property -dict { PACKAGE_PIN A11 IOSTANDARD LVCMOS33 } [get_ports { AUD_PWM }]; #IO_L4N_T0_15 Sch=aud_pwm
#set_property -dict { PACKAGE_PIN D12 IOSTANDARD LVCMOS33 } [get_ports { AUD_SD }]; #IO_L6P_T0_15 Sch=aud_sd
##USB-RS232 Interface
#set_property -dict { PACKAGE_PIN C4 IOSTANDARD LVCMOS33 } [get_ports { UART_TXD_IN }]; #IO_L7P_T1_AD6P_35 Sch=uart_txd_in
#set_property -dict { PACKAGE_PIN D4 IOSTANDARD LVCMOS33 } [get_ports { UART_RXD_OUT }]; #IO_L11N_T1_SRCC_35 Sch=uart_rxd_out
#set_property -dict { PACKAGE_PIN D3 IOSTANDARD LVCMOS33 } [get_ports { UART_CTS }]; #IO_L12N_T1_MRCC_35 Sch=uart_cts
#set_property -dict { PACKAGE_PIN E5 IOSTANDARD LVCMOS33 } [get_ports { UART_RTS }]; #IO_L5N_T0_AD13N_35 Sch=uart_rts
##USB HID (PS/2)
#set_property -dict { PACKAGE_PIN F4 IOSTANDARD LVCMOS33 } [get_ports { PS2_CLK }]; #IO_L13P_T2_MRCC_35 Sch=ps2_clk
#set_property -dict { PACKAGE_PIN B2 IOSTANDARD LVCMOS33 } [get_ports { PS2_DATA }]; #IO_L10N_T1_AD15N_35 Sch=ps2_data
##SMSC Ethernet PHY
#set_property -dict { PACKAGE_PIN C9 IOSTANDARD LVCMOS33 } [get_ports { ETH_MDC }]; #IO_L11P_T1_SRCC_16 Sch=eth_mdc
#set_property -dict { PACKAGE_PIN A9 IOSTANDARD LVCMOS33 } [get_ports { ETH_MDIO }]; #IO_L14N_T2_SRCC_16 Sch=eth_mdio
#set_property -dict { PACKAGE_PIN B3 IOSTANDARD LVCMOS33 } [get_ports { ETH_RSTN }]; #IO_L10P_T1_AD15P_35 Sch=eth_rstn
#set_property -dict { PACKAGE_PIN D9 IOSTANDARD LVCMOS33 } [get_ports { ETH_CRSDV }]; #IO_L6N_T0_VREF_16 Sch=eth_crsdv
#set_property -dict { PACKAGE_PIN C10 IOSTANDARD LVCMOS33 } [get_ports { ETH_RXERR }]; #IO_L13N_T2_MRCC_16 Sch=eth_rxerr
#set_property -dict { PACKAGE_PIN C11 IOSTANDARD LVCMOS33 } [get_ports { ETH_RXD[0] }]; #IO_L13P_T2_MRCC_16 Sch=eth_rxd[0]
#set_property -dict { PACKAGE_PIN D10 IOSTANDARD LVCMOS33 } [get_ports { ETH_RXD[1] }]; #IO_L19N_T3_VREF_16 Sch=eth_rxd[1]
#set_property -dict { PACKAGE_PIN B9 IOSTANDARD LVCMOS33 } [get_ports { ETH_TXEN }]; #IO_L11N_T1_SRCC_16 Sch=eth_txen
#set_property -dict { PACKAGE_PIN A10 IOSTANDARD LVCMOS33 } [get_ports { ETH_TXD[0] }]; #IO_L14P_T2_SRCC_16 Sch=eth_txd[0]
#set_property -dict { PACKAGE_PIN A8 IOSTANDARD LVCMOS33 } [get_ports { ETH_TXD[1] }]; #IO_L12N_T1_MRCC_16 Sch=eth_txd[1]
#set_property -dict { PACKAGE_PIN D5 IOSTANDARD LVCMOS33 } [get_ports { ETH_REFCLK }]; #IO_L11P_T1_SRCC_35 Sch=eth_refclk
#set_property -dict { PACKAGE_PIN B8 IOSTANDARD LVCMOS33 } [get_ports { ETH_INTN }]; #IO_L12P_T1_MRCC_16 Sch=eth_intn
##Quad SPI Flash
#set_property -dict { PACKAGE_PIN K17 IOSTANDARD LVCMOS33 } [get_ports { QSPI_DQ[0] }]; #IO_L1P_T0_D00_MOSI_14 Sch=qspi_dq[0]
#set_property -dict { PACKAGE_PIN K18 IOSTANDARD LVCMOS33 } [get_ports { QSPI_DQ[1] }]; #IO_L1N_T0_D01_DIN_14 Sch=qspi_dq[1]
#set_property -dict { PACKAGE_PIN L14 IOSTANDARD LVCMOS33 } [get_ports { QSPI_DQ[2] }]; #IO_L2P_T0_D02_14 Sch=qspi_dq[2]
#set_property -dict { PACKAGE_PIN M14 IOSTANDARD LVCMOS33 } [get_ports { QSPI_DQ[3] }]; #IO_L2N_T0_D03_14 Sch=qspi_dq[3]
#set_property -dict { PACKAGE_PIN L13 IOSTANDARD LVCMOS33 } [get_ports { QSPI_CSN }]; #IO_L6P_T0_FCS_B_14 Sch=qspi_csn

41
cpu_rv32i.srcs/sim_1/imports/new/cpu_tb.v Normal file
View File

@@ -0,0 +1,41 @@
`timescale 1ns / 1ps
module cpu_tb(
);
reg resetn;
reg clk;
wire [31:0] debug_wb_pc;
wire [ 3:0] debug_wb_rf_wen;
wire [ 4:0] debug_wb_rf_wnum;
wire [31:0] debug_wb_rf_wdata;
initial
begin
clk = 1'b0;
resetn = 1'b0;
#20;
resetn = 1'b1;
#5000;
//$finish;
end
always #5 clk=~clk;
soc_top u_soc_top(
.resetn (resetn ),
.clk (clk )
);
//debug signals
assign debug_wb_pc = u_soc_top.debug_wb_pc;
assign debug_wb_rf_wen = u_soc_top.debug_wb_rf_wen;
assign debug_wb_rf_wnum = u_soc_top.debug_wb_rf_wnum;
assign debug_wb_rf_wdata = u_soc_top.debug_wb_rf_wdata;
always @(posedge clk) begin
$display("PC = 0x%8h, wb_rf_wnum = 0x%2h, wb_rf_wdata = 0x%8h",
debug_wb_pc, debug_wb_rf_wnum, debug_wb_rf_wdata);
end
endmodule

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/add-longlong-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 108000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0E4000EF, 00050793, 00C50533, 00F537B3, 00D585B3, 00B785B3, 00008067, FD010113, 01412C23, 80100A37, 01612823, 318A0B13, 01512A23, 040B0A93, 01312E23, 02112623, 02812423, 02912223, 03212023, 01712623, 000A8993, 318A0A13, 000A2B83, 004A2903, 000A8493, 000B0413, 00042783, 00442603, 0044A703, 00FB87B3, 0004A503, 0177B6B3, 00C90633, 00C686B3, 00F54533, 00D747B3, 00F56533, 00153513, 00840413, F51FF0EF, 00848493, FD3412E3, 008A0A13, 040A8A93, FB4414E3, 02C12083, 02812403, 02412483, 02012903, 01C12983, 01812A03, 01412A83, 01012B03, 00C12B83, 00000513, 03010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F1DFF0EF, 00050513, 0000006B, 0000006F, 00000000, 00000000, 00000001, 00000000, 00000002, 00000000, FFFFFFFF, 7FFFFFFF, 00000000, 80000000, 00000001, 80000000, FFFFFFFE, FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000, 00000000, 00000001, 00000000, 00000002, 00000000, FFFFFFFF, 7FFFFFFF, 00000000, 80000000, 00000001, 80000000, FFFFFFFE, FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000001, 00000000, 00000002, 00000000, 00000003, 00000000, 00000000, 80000000, 00000001, 80000000, 00000002, 80000000, FFFFFFFF, FFFFFFFF, 00000000, 00000000, 00000002, 00000000, 00000003, 00000000, 00000004, 00000000, 00000001, 80000000, 00000002, 80000000, 00000003, 80000000, 00000000, 00000000, 00000001, 00000000, FFFFFFFF, 7FFFFFFF, 00000000, 80000000, 00000001, 80000000, FFFFFFFE, FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000, 00000000, FFFFFFFD, 7FFFFFFF, FFFFFFFE, 7FFFFFFF, 00000000, 80000000, 00000001, 80000000, 00000002, 80000000, FFFFFFFF, FFFFFFFF, 00000000, 00000000, 00000001, 00000000, FFFFFFFE, 7FFFFFFF, FFFFFFFF, 7FFFFFFF, 00000001, 80000000, 00000002, 80000000, 00000003, 80000000, 00000000, 00000000, 00000001, 00000000, 00000002, 00000000, FFFFFFFF, 7FFFFFFF, 00000000, 80000000, FFFFFFFE, FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000, 00000000, FFFFFFFD, 7FFFFFFF, FFFFFFFE, 7FFFFFFF, FFFFFFFF, 7FFFFFFF, FFFFFFFC, FFFFFFFF, FFFFFFFD, FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000, 00000000, 00000001, 00000000, FFFFFFFE, 7FFFFFFF, FFFFFFFF, 7FFFFFFF, 00000000, 80000000, FFFFFFFD, FFFFFFFF, FFFFFFFE, FFFFFFFF;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/add-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 0E0000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0BC000EF, 00B50533, 00008067, FE010113, 01412423, 80100A37, 01612023, 2F0A0B13, 01512223, 020B0A93, 01312623, 00112E23, 00812C23, 00912A23, 01212823, 000A8993, 2F0A0A13, 000A2903, 000A8493, 000B0413, 00042503, 0004A783, 00440413, 00A90533, 40F50533, 00153513, F85FF0EF, 00448493, FF3410E3, 00100513, 004A0A13, F71FF0EF, 020A8A93, FD4410E3, 00100513, F61FF0EF, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00812A03, 00412A83, 00012B03, 00000513, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F35FF0EF, 00050513, 0000006B, 0000006F, 00000000, 00000001, 00000002, 7FFFFFFF, 80000000, 80000001, FFFFFFFE, FFFFFFFF, 00000000, 00000001, 00000002, 7FFFFFFF, 80000000, 80000001, FFFFFFFE, FFFFFFFF, 00000001, 00000002, 00000003, 80000000, 80000001, 80000002, FFFFFFFF, 00000000, 00000002, 00000003, 00000004, 80000001, 80000002, 80000003, 00000000, 00000001, 7FFFFFFF, 80000000, 80000001, FFFFFFFE, FFFFFFFF, 00000000, 7FFFFFFD, 7FFFFFFE, 80000000, 80000001, 80000002, FFFFFFFF, 00000000, 00000001, 7FFFFFFE, 7FFFFFFF, 80000001, 80000002, 80000003, 00000000, 00000001, 00000002, 7FFFFFFF, 80000000, FFFFFFFE, FFFFFFFF, 00000000, 7FFFFFFD, 7FFFFFFE, 7FFFFFFF, FFFFFFFC, FFFFFFFD, FFFFFFFF, 00000000, 00000001, 7FFFFFFE, 7FFFFFFF, 80000000, FFFFFFFD, FFFFFFFE;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/bit-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 200000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 1DC000EF, 4035D793, 00F50533, 00054503, 0075F593, 00B55533, 00157513, 00008067, 4035D793, FF010113, 00F50533, 00A12623, 0075F793, 00100593, 00F595B3, 00C12783, 02060063, 0007C783, 00F5E5B3, 00C12783, 0FF5F593, 00B78023, 01010113, 00008067, 0007C783, FFF5C593, 00F5F5B3, 00C12783, 00B78023, 01010113, 00008067, FE010113, 0AA00793, 00000593, 00C10513, 00112E23, 00F11623, F71FF0EF, 00153513, F51FF0EF, 00100593, 00C10513, F5DFF0EF, FFF50513, 00153513, F39FF0EF, 00200593, 00C10513, F45FF0EF, 00153513, F25FF0EF, 00300593, 00C10513, F31FF0EF, FFF50513, 00153513, F0DFF0EF, 00400593, 00C10513, F19FF0EF, 00153513, EF9FF0EF, 00500593, 00C10513, F05FF0EF, FFF50513, 00153513, EE1FF0EF, 00600593, 00C10513, EEDFF0EF, 00153513, ECDFF0EF, 00700593, 00C10513, ED9FF0EF, FFF50513, 00153513, EB5FF0EF, 00C10513, 00100613, 00800593, ED9FF0EF, 00C10513, 00000613, 00900593, EC9FF0EF, 00C10513, 00100613, 00A00593, EB9FF0EF, 00C10513, 00000613, 00B00593, EA9FF0EF, 00C10513, 00100613, 00C00593, E99FF0EF, 00C10513, 00000613, 00D00593, E89FF0EF, 00C10513, 00100613, 00E00593, E79FF0EF, 00C10513, 00000613, 00F00593, E69FF0EF, 00D14503, FAB50513, 00153513, E25FF0EF, 01C12083, 00000513, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, E85FF0EF, 00050513, 0000006B, 0000006F;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/bubble-sort-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 190000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 16C000EF, 80100537, 01300593, 3A050513, FFF00813, 00000713, 00050793, 02B75263, 0007A683, 0047A603, 00170713, 00D65663, 00C7A023, 00D7A223, 00478793, FEB742E3, FFF58593, FD0598E3, 00008067, FE010113, 01212823, 80100937, 00112E23, 00812C23, 00912A23, 01312623, 01412423, 01300593, 3A090913, FFF00513, 00000713, 00090493, 00090793, 02B75263, 0007A683, 0047A603, 00170713, 00D65663, 00C7A023, 00D7A223, 00478793, FEB742E3, FFF58593, FCA596E3, 00090993, 00000413, 01400A13, 0009A503, 00498993, 40850533, 00153513, 00140413, F1DFF0EF, FF4414E3, 00100513, F11FF0EF, 01300593, FFF00513, 00000713, 00090793, 02B75263, 0007A683, 0047A603, 00170713, 00D65663, 00C7A023, 00D7A223, 00478793, FEB742E3, FFF58593, FCA598E3, 00000413, 01400913, 0004A503, 00448493, 40850533, 00153513, 00140413, EB5FF0EF, FF2414E3, 00100513, EA9FF0EF, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00812A03, 00000513, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, EC5FF0EF, 00050513, 0000006B, 0000006F, 00000002, 0000000C, 0000000E, 00000006, 0000000D, 0000000F, 00000010, 0000000A, 00000000, 00000012, 0000000B, 00000013, 00000009, 00000001, 00000007, 00000005, 00000004, 00000003, 00000008, 00000011;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/div-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 0F4000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0D0000EF, FF010113, 80100737, 00912223, 00112623, 30470493, 00812423, 01212023, 30470713, 00000793, 00A00693, 00F72023, 00178793, 00470713, FED79AE3, 02848593, 00048613, 00B00693, 00062703, 00100793, 02F70733, 00178793, FED79CE3, 00E62023, 00460613, FEB612E3, 00048593, 00B00693, 0005A703, 00100793, 02F74733, 00178793, FED79CE3, 00E5A023, 00458593, FEB612E3, 00000413, 00A00913, 0004A503, 00448493, 40850533, 00153513, 00140413, F41FF0EF, FF2414E3, 00C12083, 00812403, 00412483, 00012903, 00000513, 01010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F19FF0EF, 00050513, 0000006B, 0000006F, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/dummy-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 00C000EF, 00000513, 00008067, 80000537, FF010113, 00050513, 00112623, FE9FF0EF, 00050513, 0000006B, 0000006F;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/fact-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 114000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0F0000EF, 00050793, 00100713, 00100513, 00F77A63, 02F50533, FFF78793, FEE79CE3, 00008067, 00008067, FE010113, 01212823, 80100937, 32490913, 00092783, 01312623, 801009B7, 00100513, 35898993, 00912A23, 00A9A023, 00000493, 40A78533, 01412423, 00148493, 00D00A13, 00153513, 00812C23, 00112E23, 00100413, F75FF0EF, 05448063, 06848063, 00048793, 00100513, 02F50533, FFF78793, FE879CE3, 00498993, 00490913, 00092783, 00A9A023, 00148493, 40A78533, 00153513, F39FF0EF, FD4494E3, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00812A03, 00000513, 02010113, 00008067, 00100513, 00498993, 00490913, FB5FF06F, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F1DFF0EF, 00050513, 0000006B, 0000006F, 00000001, 00000001, 00000002, 00000006, 00000018, 00000078, 000002D0, 000013B0, 00009D80, 00058980, 00375F00, 02611500, 1C8CFC00, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/fib-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 09C000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 078000EF, FF010113, 00812423, 80100437, 2AC40413, 00912223, 01212023, 00112623, 0A840493, 09840913, 00042703, 00442783, 0004A503, 00440413, 00E787B3, 40F50533, 00F42223, 00153513, FA5FF0EF, 00448493, FD241CE3, 00100513, F95FF0EF, 00C12083, 00812403, 00412483, 00012903, 00000513, 01010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F71FF0EF, 00050513, 0000006B, 0000006F, 00000001, 00000001, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000001, 00000001, 00000002, 00000003, 00000005, 00000008, 0000000D, 00000015, 00000022, 00000037, 00000059, 00000090, 000000E9, 00000179, 00000262, 000003DB, 0000063D, 00000A18, 00001055, 00001A6D, 00002AC2, 0000452F, 00006FF1, 0000B520, 00012511, 0001DA31, 0002FF42, 0004D973, 0007D8B5, 000CB228, 00148ADD, 00213D05, 0035C7E2, 005704E7, 008CCCC9, 00E3D1B0, 01709E79, 02547029, 03C50EA2, 06197ECB;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/goldbach-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 13C000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 118000EF, 00100793, 00050713, 02A7D663, 00200793, 02F50663, 00157513, 00051863, 01C0006F, 02F766B3, 00068863, 00178793, FEF71AE3, 00008067, 00000513, 00008067, 00100513, 00008067, 00200793, 00050593, 00200713, 00200813, 00100893, 06A7D063, 03070263, 00177793, 04078663, 00200793, 00C0006F, 02F766B3, 02068E63, 00178793, FEE79AE3, 40E586B3, 02D8D663, 03068C63, 0016F513, 02050063, 00200793, 00C0006F, 02F6E633, 00060863, 00178793, FED79AE3, 00008067, 00170713, FAE594E3, 00000513, 00008067, 00100513, 00008067, FF010113, 00812423, 00912223, 00112623, 00400413, 02000493, 00040513, F61FF0EF, FFF50513, 00240413, 00153513, EF5FF0EF, FE9414E3, 00C12083, 00812403, 00412483, 00000513, 01010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F99FF0EF, 00050513, 0000006B, 0000006F;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/hello-str-riscv32-nemu.coe Normal file
View File

File diff suppressed because one or more lines are too long

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/if-else-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 124000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 100000EF, 1F400713, 00050793, 02A74863, 12C00713, 06400513, 02F74463, 06400713, 04B00513, 00F74E63, 03200513, 00F52533, 40A00533, 03257513, 00008067, 09600513, 00008067, FE010113, 00912A23, 801004B7, 33448493, 00812C23, 01212823, 01312623, 01412423, 01512223, 01612023, 00112E23, 03848413, 07048993, 1F400913, 12C00A13, 06400B13, 03200A93, 0004A783, 09600713, 00448493, 02F94063, 06400713, 00FA4C63, 00FAA733, 40E006B3, 04B00713, 00FB4463, 0326F713, 00042503, 00440413, 40E50533, 00153513, F29FF0EF, FD3410E3, 00100513, F1DFF0EF, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00812A03, 00412A83, 00012B03, 00000513, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F29FF0EF, 00050513, 0000006B, 0000006F, FFFFFFFF, 00000000, 00000031, 00000032, 00000033, 00000063, 00000064, 00000065, 0000012B, 0000012C, 0000012D, 000001F3, 000001F4, 000001F5, 00000000, 00000000, 00000000, 00000000, 00000032, 00000032, 00000032, 0000004B, 0000004B, 0000004B, 00000064, 00000064, 00000064, 00000096;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/leap-year-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 0E4000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0C0000EF, 00357793, 00079A63, 06400713, 02E56733, 00100793, 00071863, 19000793, 02F56533, 00153793, 00078513, 00008067, FE010113, 00912A23, 801004B7, 00812C23, 01212823, 01312623, 01412423, 00112E23, 2F448493, 76200413, 19000993, 06400A13, 7DF00913, 00347793, 00079863, 03446733, 00100793, 00071663, 03346533, 00153793, 0004A503, 00140413, 00448493, 40F50533, 00153513, F59FF0EF, FD2416E3, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00812A03, 00000513, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F55FF0EF, 00050513, 0000006B, 0000006F, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000, 00000000, 00000001, 00000000, 00000000;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/load-store-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 1B4000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 190000EF, FE010113, 00812C23, 80100437, 01312623, 3C440993, 01212823, 01098913, 00912A23, 01412423, 3C440493, 00112E23, 00090A13, 3C440413, 00041503, 00092783, 00240413, 00490913, 40F50533, 00153513, F9DFF0EF, FE8A12E3, 03048A13, 00098913, 00095503, 000A2783, 00290913, 004A0A13, 40F50533, 00153513, F75FF0EF, FE8912E3, 0024C703, 0014C683, 0034C783, 0044C503, 00871713, 00D76733, 01079793, 0504A683, 00E7E7B3, 01851513, 00F56533, 40D50533, 00153513, F39FF0EF, 0064C703, 0054C683, 0074C783, 0084C503, 00871713, 00D76733, 01079793, 0544A683, 00E7E7B3, 01851513, 00F56533, 40D50533, 00153513, F01FF0EF, 00A4C703, 0094C683, 00B4C783, 00C4C503, 00871713, 00D76733, 01079793, 0584A683, 00E7E7B3, 01851513, 00F56533, 40D50533, 00153513, 06048413, EC5FF0EF, 00100493, 00100A13, 01100913, 009A17B3, 00042503, FFF7C793, 01079793, 0107D793, 40F50533, 00153513, 00248493, 00F99023, 00440413, E8DFF0EF, 00298993, FD2498E3, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00812A03, 00000513, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, E59FF0EF, 00050513, 0000006B, 0000006F, 02580000, 7FFF4ABC, 81008000, FFFFABCD, 00000000, 00000258, 00004ABC, 00007FFF, FFFF8000, FFFF8100, FFFFABCD, FFFFFFFF, 00000000, 00000258, 00004ABC, 00007FFF, 00008000, 00008100, 0000ABCD, 0000FFFF, BC025800, 007FFF4A, CD810080, 00FFFFAB, 0000FFFD, 0000FFF7, 0000FFDF, 0000FF7F, 0000FDFF, 0000F7FF, 0000DFFF, 00007FFF;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/matrix-mul-riscv32-nemu.coe Normal file
View File

File diff suppressed because one or more lines are too long

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/max-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 0E8000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0C4000EF, 00B55463, 00058513, 00008067, FE010113, 01412423, 80100A37, 01612023, 2F8A0B13, 01512223, 020B0A93, 01312623, 00112E23, 00812C23, 00912A23, 01212823, 000A8993, 2F8A0A13, 000A2903, 000A8493, 000B0413, 00042503, 00440413, 01255463, 00090513, 0004A783, 00448493, 40F50533, 00153513, F79FF0EF, FD341EE3, 00100513, 004A0A13, F69FF0EF, 020A8A93, FB441EE3, 00100513, F59FF0EF, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00812A03, 00412A83, 00012B03, 00000513, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F31FF0EF, 00050513, 0000006B, 0000006F, 00000000, 00000001, 00000002, 7FFFFFFF, 80000000, 80000001, FFFFFFFE, FFFFFFFF, 00000000, 00000001, 00000002, 7FFFFFFF, 00000000, 00000000, 00000000, 00000000, 00000001, 00000001, 00000002, 7FFFFFFF, 00000001, 00000001, 00000001, 00000001, 00000002, 00000002, 00000002, 7FFFFFFF, 00000002, 00000002, 00000002, 00000002, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 7FFFFFFF, 00000000, 00000001, 00000002, 7FFFFFFF, 80000000, 80000001, FFFFFFFE, FFFFFFFF, 00000000, 00000001, 00000002, 7FFFFFFF, 80000001, 80000001, FFFFFFFE, FFFFFFFF, 00000000, 00000001, 00000002, 7FFFFFFF, FFFFFFFE, FFFFFFFE, FFFFFFFE, FFFFFFFF, 00000000, 00000001, 00000002, 7FFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/min3-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 134000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 110000EF, 00B65463, 00060593, 00B55463, 00050593, 00058513, 00008067, FD010113, 01812423, 80100C37, 01712623, 344C0B93, 01912223, 010B8C93, 01412C23, 02112623, 02812423, 02912223, 03212023, 01312E23, 01512A23, 01612823, 000C8A13, 344C0C13, 000C2B03, 000C8A93, 000B8993, 0009A903, 012B5463, 000B0913, 000A8493, 000B8413, 00042503, 00440413, 00A95463, 00090513, 0004A783, 00448493, 40F50533, 00153513, F4DFF0EF, FD441EE3, 00100513, 00498993, F3DFF0EF, 010A8A93, FA899AE3, 00100513, 004C0C13, F29FF0EF, 040C8C93, F9899AE3, 00100513, F19FF0EF, 02C12083, 02812403, 02412483, 02012903, 01C12983, 01812A03, 01412A83, 01012B03, 00C12B83, 00812C03, 00412C83, 00000513, 03010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, EF1FF0EF, 00050513, 0000006B, 0000006F, 00000000, 7FFFFFFF, 80000000, FFFFFFFF, 00000000, 00000000, 80000000, FFFFFFFF, 00000000, 00000000, 80000000, FFFFFFFF, 80000000, 80000000, 80000000, 80000000, FFFFFFFF, FFFFFFFF, 80000000, FFFFFFFF, 00000000, 00000000, 80000000, FFFFFFFF, 00000000, 7FFFFFFF, 80000000, FFFFFFFF, 80000000, 80000000, 80000000, 80000000, FFFFFFFF, FFFFFFFF, 80000000, FFFFFFFF, 80000000, 80000000, 80000000, 80000000, 80000000, 80000000, 80000000, 80000000, 80000000, 80000000, 80000000, 80000000, 80000000, 80000000, 80000000, 80000000, FFFFFFFF, FFFFFFFF, 80000000, FFFFFFFF, FFFFFFFF, FFFFFFFF, 80000000, FFFFFFFF, 80000000, 80000000, 80000000, 80000000, FFFFFFFF, FFFFFFFF, 80000000, FFFFFFFF;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/mov-c-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 0FC000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0D8000EF, FF010113, 801007B7, 00112623, 3007A823, 00812423, 00912223, 31078413, 00100713, 00E42223, 00200713, 00E42423, 00300713, 00E42623, 00400713, 00E42823, 00C42703, 801004B7, 30E4A623, 30C4A703, 00E42A23, 3107A503, 00153513, F91FF0EF, 00442503, FFF50513, 00153513, F81FF0EF, 00842503, FFE50513, 00153513, F71FF0EF, 00C42503, FFD50513, 00153513, F61FF0EF, 01042503, FFC50513, 00153513, F51FF0EF, 30C4A503, FFD50513, 00153513, F41FF0EF, 01442503, FFD50513, 00153513, F31FF0EF, 00C12083, 00812403, 00412483, 00000513, 01010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F11FF0EF, 00050513, 0000006B, 0000006F, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/movsx-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 1B0000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 18C000EF, FE010113, 00912A23, 801004B7, 00112E23, 00812C23, 01212823, 01312623, 01412423, 3C448413, 3C04A223, 00100793, 00F42223, 00200793, 00F42423, 00300793, 00F42623, 00400793, 00F42823, 00C42783, 80100A37, 801009B7, 3CFA2023, 3C0A2783, 3EC98913, 00F42A23, 06100793, 3EF98623, 3EC9C503, 01851513, 41855513, F9F50513, 00153513, F69FF0EF, 3EC9C783, 00F900A3, 00194503, 01851513, 41855513, F9F50513, 00153513, F49FF0EF, 3EC9C783, 01879793, 4187D793, 3CF4A223, 3C44A503, F9F50513, 00153513, F29FF0EF, F8000793, 00F900A3, 00194783, 01879793, 4187D793, 3CF4A223, 00442503, FFF50513, 00153513, F01FF0EF, 00842503, FFE50513, 00153513, EF1FF0EF, 00C42503, FFD50513, 00153513, EE1FF0EF, 01042503, FFC50513, 00153513, ED1FF0EF, 3C0A2503, FFD50513, 00153513, EC1FF0EF, 01442503, FFD50513, 00153513, EB1FF0EF, 00194503, 01851513, 41855513, 08050513, 00153513, E99FF0EF, 3C44A503, 08050513, 00153513, E89FF0EF, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00000513, 00812A03, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, E5DFF0EF, 00050513, 0000006B, 0000006F, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/mul-longlong-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 138000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 114000EF, 02A686B3, 02C585B3, 02C537B3, 00D585B3, 02C50533, 00F585B3, 00008067, FD010113, 02912223, 01312E23, 801004B7, 801009B7, 03212023, 01412C23, 01512A23, 01612823, 35848A93, 02112623, 02812423, 01712623, 01812423, 34898993, 00000913, 00000A13, 35848493, 00400B13, 0009AC03, 00391413, 008A8433, 00098B93, 00048A93, 000C0793, 02FC06B3, 00042503, 00442703, 004B8B93, 00840413, 02FC17B3, 00D54533, 00F747B3, 00F56533, 00153513, F41FF0EF, 01748663, 000BA783, FCDFF06F, 00490913, 41490933, 00100513, 001A0A13, F21FF0EF, 00498993, F96A1CE3, 00100513, F11FF0EF, 02C12083, 02812403, 02412483, 02012903, 01C12983, 01812A03, 01412A83, 01012B03, 00C12B83, 00812C03, 00000513, 03010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, EF1FF0EF, 00050513, 0000006B, 0000006F, AEB1C2AA, 4500FF2B, 877190AF, 11F42438, DB1A18E4, 19D29AB9, 3AC3088E, EA15986D, FC0DB236, 2649E980, 0A4A7D30, FA4C43DA, 2C56B139, 1299898E, 0A319E65, DF8123D5, 4C15DD68, 04D6DFA8, 9E4357A1, 38C5D79B, 1EFC4248, F78B91CB, 7FDFCC40, 014255A4;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/pascal-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 0F8000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0D4000EF, FF010113, 00912223, 801004B7, 38448713, 00812423, 00100793, 38448893, 00112623, 01212023, 80100437, 801005B7, 00F72223, 38F4A223, 38C40413, 38448493, 07C88813, 00100713, 38858593, 00100513, 00058793, 00100693, 0080006F, 0007A703, 00D70633, 00C7A023, 00478793, 00070693, FE8796E3, 00A42023, 00440413, 01040663, 0048A703, FCDFF06F, 80100937, 30890913, 0004A503, 00092783, 00448493, 00490913, 40F50533, 00153513, F45FF0EF, FE8492E3, 00100513, F39FF0EF, 00C12083, 00812403, 00412483, 00012903, 00000513, 01010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F15FF0EF, 00050513, 0000006B, 0000006F, 00000001, 0000001E, 000001B3, 00000FDC, 00006B0D, 00022CAA, 00090F6F, 001F1058, 00594EFD, 00DA4F4E, 01CA7357, 03418BE4, 0527C829, 072363EA, 08AAF953, 093EE7D0, 08AAF953, 072363EA, 0527C829, 03418BE4, 01CA7357, 00DA4F4E, 00594EFD, 001F1058, 00090F6F, 00022CAA, 00006B0D, 00000FDC, 000001B3, 0000001E, 00000001, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000, 00000000;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/prime-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 0B8000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 094000EF, FE010113, 01312623, 801009B7, 00812C23, 00912A23, 01212823, 00112E23, 00000493, 06500413, 2C898993, 09700913, 00200793, 02F46733, 00178793, 02070263, FE879AE3, 00249793, 00F987B3, 0007A503, 00148493, 40850533, 00153513, F91FF0EF, 00240413, FD2416E3, FF648513, 00153513, F7DFF0EF, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00000513, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F55FF0EF, 00050513, 0000006B, 0000006F, 00000065, 00000067, 0000006B, 0000006D, 00000071, 0000007F, 00000083, 00000089, 0000008B, 00000095;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/quick-sort-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 220000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 1FC000EF, 00259793, 00F506B3, 0006A883, 0AC5D663, 00261713, 00E50733, 00072703, FFF60693, 00269693, 00D506B3, 00068813, FFC68693, 02E8D663, FFF60613, 0046A703, FEC5C6E3, 00F506B3, 00E6A023, 00058613, 00E82023, 0116A023, 00060513, 00008067, 00F506B3, 00261813, 00E6A023, 01050833, 02C5DC63, 00478793, 00F507B3, 00C0006F, 00478793, 00E8CC63, 00158593, 0007A703, 00078693, FEC596E3, FB9FF06F, 00E82023, 00259793, F7DFF06F, 00E82023, 00058613, 0116A023, 00060513, 00008067, 00058613, 0116A023, 00060513, 00008067, 06C5D463, FF010113, 00812423, 00912223, 01212023, 00112623, 00058413, 00060493, 00050913, 00040593, 00048613, 00090513, F09FF0EF, 00050793, 00040593, FFF50613, 00178413, 00090513, FB9FF0EF, FC944CE3, 00C12083, 00812403, 00412483, 00012903, 01010113, 00008067, 00008067, FE010113, 01412423, 80100A37, 01300613, 00000593, 430A0513, 00812C23, 00912A23, 01212823, 01312623, 00112E23, 430A0493, F65FF0EF, 430A0913, 00000413, 01400993, 00092503, 00490913, 40850533, 00153513, 00140413, E61FF0EF, FF3414E3, 00100513, E55FF0EF, 01300613, 00000593, 430A0513, F25FF0EF, 00000413, 01400913, 0004A503, 00448493, 40850533, 00153513, 00140413, E25FF0EF, FF2414E3, 00100513, E19FF0EF, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00812A03, 00000513, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F21FF0EF, 00050513, 0000006B, 0000006F, 00000002, 0000000C, 0000000E, 00000006, 0000000D, 0000000F, 00000010, 0000000A, 00000000, 00000012, 0000000B, 00000013, 00000009, 00000001, 00000007, 00000005, 00000004, 00000003, 00000008, 00000011;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/recursion-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 220000EF, 801007B7, 44C7A703, 00B75463, 44B7A623, 80100737, 45072783, 00178793, 44F72823, 00A05E63, 00300793, 02F54533, 801007B7, 43C7A303, 00158593, 00030067, 00100513, 00008067, 801007B7, 44C7A703, 00B75463, 44B7A623, 80100737, 45072783, 00178793, 44F72823, 00A05C63, 801007B7, 4307A303, 00158593, FFF50513, 00030067, 00100513, 00008067, 801007B7, 44C7A703, 00B75463, 44B7A623, 80100737, 45072783, 00178793, 44F72823, 02A05663, 801007B7, 4347A783, FF010113, 00112623, 00158593, 000780E7, 00C12083, 00950513, 01010113, 00008067, 00100513, 00008067, 801007B7, 44C7A703, 00B75463, 44B7A623, 80100737, 45072783, 00178793, 44F72823, 06A05E63, FE010113, 01212823, 80100937, 43090913, 00892783, 00812C23, 00912A23, 00158413, 40155493, 00112E23, 01312623, 00040593, 00048513, 000780E7, 00892783, 00050993, 00040593, 00048513, 000780E7, 01C12083, 01812403, 00199793, 013787B3, 00151513, 01412483, 01012903, 00C12983, 00A78533, 02010113, 00008067, 00100513, 00008067, 00050463, 00008067, FF010113, 00100513, 00112623, 080000EF, FF010113, 00812423, 80100437, 43040413, 00042783, 00004537, 00112623, 00000593, 82350513, 000780E7, 01042783, 40A78533, 00153513, FB5FF0EF, 801007B7, 4507A783, 01442503, 40F50533, 00153513, F9DFF0EF, 801007B7, 44C7A783, 01842503, 40F50533, 00153513, F85FF0EF, 00C12083, 00812403, 00000513, 01010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F69FF0EF, 00050513, 0000006B, 0000006F, 801001F4, 80100238, 80100278, 801002CC, 0000957E, 000000DA, 00000014, 00000000, 00000000;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/select-sort-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 1F8000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 1D4000EF, 80100E37, 408E0E13, 004E0813, 00000613, 01400513, 01300E93, FFC82303, 00160893, 00080713, 00030593, 00088793, 00072683, 00470713, 00B6D663, 00078613, 00068593, 00178793, FEA794E3, 00261613, FEB82E23, 00CE0633, 00662023, 00480813, 00088613, FBD89CE3, 00008067, FE010113, 00812C23, 80100437, 40840413, 00912A23, 00440493, 00112E23, 01212823, 01312623, 01412423, 01512223, 00048813, 00000613, 01400513, 01300E13, FFC82303, 00160893, 00080713, 00030593, 00088793, 00072683, 00470713, 00B6D663, 00078613, 00068593, 00178793, FEA794E3, 00261613, FEB82E23, 00C40633, 00662023, 00480813, 00088613, FBC89CE3, 00040913, 00040A13, 00000993, 01400A93, 000A2503, 004A0A13, 41350533, 00153513, 00198993, ED5FF0EF, FF5994E3, 00100513, EC9FF0EF, 00000613, 01400513, 01300313, FFC4A883, 00160813, 00048713, 00088593, 00080793, 00072683, 00470713, 00B6D663, 00078613, 00068593, 00178793, FEA794E3, 00261613, FEB4AE23, 00C40633, 01162023, 00448493, 00080613, FA681CE3, 00000413, 01400493, 00092503, 00490913, 40850533, 00153513, 00140413, E51FF0EF, FE9414E3, 00100513, E45FF0EF, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00812A03, 00412A83, 00000513, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, E7DFF0EF, 00050513, 0000006B, 0000006F, 00000002, 0000000C, 0000000E, 00000006, 0000000D, 0000000F, 00000010, 0000000A, 00000000, 00000012, 0000000B, 00000013, 00000009, 00000001, 00000007, 00000005, 00000004, 00000003, 00000008, 00000011;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/shift-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 118000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0F4000EF, FE010113, 00812C23, 80100437, 00912A23, 32840493, 01312623, 02048993, 01212823, 01412423, 32840913, 00112E23, 01512223, 00098A13, 32840413, 00042503, 0009A783, 00440413, 00755513, 40F50533, 00153513, F99FF0EF, 00498993, FF4410E3, 04090A13, 00048993, 00400413, 00C00A93, 0009A503, 000A2783, 00498993, 40855533, 40F50533, 00153513, 00140413, F61FF0EF, 004A0A13, FD541EE3, 06090913, 00400413, 00C00993, 0004A503, 00092783, 00448493, 00855533, 40F50533, 00153513, 00140413, F2DFF0EF, 00490913, FD341EE3, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00812A03, 00412A83, 00000513, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, EF5FF0EF, 00050513, 0000006B, 0000006F, 12345678, 98765432, 00000000, EFFA1000, 7FFFFFFF, 80000000, 00000033, FFFFFFFF, 002468AC, 0130ECA8, 00000000, 01DFF420, 00FFFFFF, 01000000, 00000000, 01FFFFFF, 01234567, FCC3B2A1, 00000000, FFDFF420, 007FFFFF, FFC00000, 00000000, FFFFFFFF, 01234567, 04C3B2A1, 00000000, 01DFF420, 007FFFFF, 00400000, 00000000, 001FFFFF;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/shuixianhua-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 104000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0E0000EF, 02A507B3, 02A78533, 00008067, FE010113, 00912A23, 801004B7, 00812C23, 01212823, 01312623, 01412423, 01512223, 00112E23, 06400413, 00000A93, 1F400993, 06400A13, 00A00913, 31448493, 00140413, 05340E63, 032447B3, 03444633, 0327E7B3, 032466B3, 02F78733, 02C60533, 02D685B3, 02F707B3, 02C50633, 02D586B3, 00C787B3, 00D787B3, FC8794E3, 002A9793, 00F487B3, 0007A503, 001A8A93, 40850533, 00153513, 00140413, F49FF0EF, FB3416E3, FFCA8513, 00153513, F39FF0EF, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00812A03, 00412A83, 00000513, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F15FF0EF, 00050513, 0000006B, 0000006F, 00000099, 00000172, 00000173, 00000197;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/string-riscv32-nemu.coe Normal file
View File

File diff suppressed because one or more lines are too long

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/sub-longlong-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 108000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0E4000EF, 00050793, 40C50533, 00A7B7B3, 40D585B3, 40F585B3, 00008067, FD010113, 01312E23, 801009B7, 01512A23, 31898A93, 01412C23, 040A8A13, 03212023, 02112623, 02812423, 02912223, 01612823, 01712623, 000A0913, 31898993, 0009AB83, 0049A483, 000A0B13, 000A8413, 00042703, 00442783, 004B2683, 40EB8733, 000B2503, 00EBB633, 40F487B3, 40C787B3, 00E54533, 00F6C7B3, 00F56533, 00153513, 00840413, F51FF0EF, 008B0B13, FD2412E3, 00898993, 040A0A13, FA8994E3, 02C12083, 02812403, 02412483, 02012903, 01C12983, 01812A03, 01412A83, 01012B03, 00C12B83, 00000513, 03010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F1DFF0EF, 00050513, 0000006B, 0000006F, 00000000, 00000000, 00000001, 00000000, 00000002, 00000000, FFFFFFFF, 7FFFFFFF, 00000000, 80000000, 00000001, 80000000, FFFFFFFE, FFFFFFFF, FFFFFFFF, FFFFFFFF, 00000000, 00000000, FFFFFFFF, FFFFFFFF, FFFFFFFE, FFFFFFFF, 00000001, 80000000, 00000000, 80000000, FFFFFFFF, 7FFFFFFF, 00000002, 00000000, 00000001, 00000000, 00000001, 00000000, 00000000, 00000000, FFFFFFFF, FFFFFFFF, 00000002, 80000000, 00000001, 80000000, 00000000, 80000000, 00000003, 00000000, 00000002, 00000000, 00000002, 00000000, 00000001, 00000000, 00000000, 00000000, 00000003, 80000000, 00000002, 80000000, 00000001, 80000000, 00000004, 00000000, 00000003, 00000000, FFFFFFFF, 7FFFFFFF, FFFFFFFE, 7FFFFFFF, FFFFFFFD, 7FFFFFFF, 00000000, 00000000, FFFFFFFF, FFFFFFFF, FFFFFFFE, FFFFFFFF, 00000001, 80000000, 00000000, 80000000, 00000000, 80000000, FFFFFFFF, 7FFFFFFF, FFFFFFFE, 7FFFFFFF, 00000001, 00000000, 00000000, 00000000, FFFFFFFF, FFFFFFFF, 00000002, 80000000, 00000001, 80000000, 00000001, 80000000, 00000000, 80000000, FFFFFFFF, 7FFFFFFF, 00000002, 00000000, 00000001, 00000000, 00000000, 00000000, 00000003, 80000000, 00000002, 80000000, FFFFFFFE, FFFFFFFF, FFFFFFFD, FFFFFFFF, FFFFFFFC, FFFFFFFF, FFFFFFFF, 7FFFFFFF, FFFFFFFE, 7FFFFFFF, FFFFFFFD, 7FFFFFFF, 00000000, 00000000, FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFF, FFFFFFFE, FFFFFFFF, FFFFFFFD, FFFFFFFF, 00000000, 80000000, FFFFFFFF, 7FFFFFFF, FFFFFFFE, 7FFFFFFF, 00000001, 00000000, 00000000, 00000000;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/sum-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 078000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 054000EF, FE010113, 00112E23, 00012623, 00100793, 06500693, 00C12703, 00F70733, 00E12623, 00178793, FED798E3, 00C12503, FFFFF7B7, C4678793, 00F50533, 00153513, FADFF0EF, 01C12083, 00000513, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F95FF0EF, 00050513, 0000006B, 0000006F;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/switch-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 0F0000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0CC000EF, 00C00793, 00A7EE63, 801007B7, 30078793, 00251513, 00A78533, 00052503, 00008067, FFF00513, 00008067, FE010113, 00812C23, 80100437, 33440413, 80100737, 00912A23, 01212823, 01312623, 01412423, 00112E23, 03840913, 00000493, FFF00793, 00C00993, 30070A13, 0140006F, FFF00793, 0499F663, 00148493, 00440413, 00042503, 40F50533, 00153513, F65FF0EF, FF2410E3, 00100513, F59FF0EF, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00812A03, 00000513, 02010113, 00008067, 00249793, 00FA07B3, 0007A783, FADFF06F, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F45FF0EF, 00050513, 0000006B, 0000006F, 00000000, 00000002, 00000005, 00000005, 00000008, 00000008, 00000008, 00000008, 0000000A, 0000000A, 0000000A, 0000000A, 0000000F, FFFFFFFF, 00000000, 00000002, 00000005, 00000005, 00000008, 00000008, 00000008, 00000008, 0000000A, 0000000A, 0000000A, 0000000A, 0000000F, FFFFFFFF;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/to-lower-case-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 0E0000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0BC000EF, FBF50793, 0FF7F793, 01900713, 00F76663, 02050513, 0FF57513, 00008067, FE010113, 01212823, 80100937, 00812C23, 00912A23, 01312623, 01412423, 00112E23, 0C000493, 00000413, 00000793, 2F090913, 08000993, 01900A13, 00890733, 00074503, 00140413, 40F50533, 00153513, F81FF0EF, 00148713, 01340A63, 0FF47793, 029A7863, 0FF77493, FD5FF06F, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00812A03, 00000513, 02010113, 00008067, 02078513, 0FF57793, 0FF77493, FA1FF06F, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F49FF0EF, 00050513, 0000006B, 0000006F, 03020100, 07060504, 0B0A0908, 0F0E0D0C, 13121110, 17161514, 1B1A1918, 1F1E1D1C, 23222120, 27262524, 2B2A2928, 2F2E2D2C, 33323130, 37363534, 3B3A3938, 3F3E3D3C, 63626140, 67666564, 6B6A6968, 6F6E6D6C, 73727170, 77767574, 5B7A7978, 5F5E5D5C, 63626160, 67666564, 6B6A6968, 6F6E6D6C, 73727170, 77767574, 7B7A7978, 7F7E7D7C;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/uart-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 00C000EF, 00002023, 00100073, 80000537, FF010113, 00050513, 00112623, FE9FF0EF, 00050513, 0000006B, 0000006F;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/unalign-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 11C000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0F8000EF, FD010113, 02912223, 03212023, 554434B7, 80100937, 02812423, 01312E23, 01412C23, 01512A23, 01612823, 01712623, 01812423, 02112623, 00400B93, 33090413, 80100C37, FDD00B13, FCC00A93, FBB00A13, FAA00993, 32348493, 00344783, 016401A3, 00444783, 01540223, 00544783, 014402A3, 00644783, 01340323, 00344603, 00444683, 00544703, 00644783, 00869693, 00C6E6B3, 01071713, 00D76733, 01879793, 00E7E7B3, 32FC2623, 32CC2503, FFFB8B93, 00950533, 00153513, F39FF0EF, 000400A3, 32090823, F80B9CE3, 02C12083, 02812403, 02412483, 02012903, 01C12983, 01812A03, 01412A83, 01012B03, 00C12B83, 00812C03, 00000513, 03010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, EF1FF0EF, 00050513, 0000006B, 0000006F, FFFFFFFF, 00000000, 00000000, 00000000, 00000000;

3
cpu_rv32i.srcs/sources_1/ip/coe_longxin/wanshu-riscv32-nemu.coe Normal file
View File

@@ -0,0 +1,3 @@
memory_initialization_radix = 16;
memory_initialization_vector =
00106093, 00209093, 0080E093, 00106113, 00311113, 00116113, 00806093, 0010D193, 01006193, 001151B3, 00206093, 01006113, 001151B3, 0001E193, 00806093, 00306113, 003081B3, 0001E193, 00210193, 403081B3, 00606093, 00306113, 0020A1B3, 001121B3, 0050A193, 0420A193, FFA06093, FFD06113, 0020A1B3, 001121B3, FFB0A193, FBE0A193, 0020B1B3, 001131B3, FFB0B193, FBE0B193, 01806093, 00806113, 0020F1B3, 0100F193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 004000EF, 00306093, 00308113, 008000EF, 01606093, 00506113, 00506193, 00310463, 00906113, 00306113, 00506193, 00311463, 00906113, 00506113, 00506193, 00311463, 00906113, 00206213, 00506293, 00524863, 00906113, 00806113, 00306113, FFB06213, FFE06293, 00524663, FFB06213, FFE06293, FFE06213, 14D06293, 00526C63, 00006093, 00106113, 00206213, 00306293, 010000EF, 00906213, 00A06293, 00008067, 00006093, 00106113, 00206213, 00306293, 00406333, 005063B3, 00706093, 00806113, 0020C1B3, 0190C193, 00006093, 00006113, 00006193, 00006213, 00006293, 00006313, 00006393, 00006413, 00006493, 00006513, 00006593, 00006613, 00006693, 00006713, 00006793, 00006813, 00000413, 00009117, E1810113, 0CC000EF, 00050463, 00008067, FF010113, 00100513, 00112623, 0A8000EF, FE010113, 01312623, 801009B7, 00812C23, 00912A23, 01212823, 00112E23, 00100413, 00000913, 01E00493, 2DC98993, 00140413, 04940463, 00100793, 00000693, 02F46733, 00071463, 00F686B3, 00178793, FEF418E3, FC869EE3, 00291793, 013787B3, 0007A503, 00190913, 40850533, 00153513, 00140413, F79FF0EF, FC9410E3, FFE90513, 00153513, F69FF0EF, 01C12083, 01812403, 01412483, 01012903, 00C12983, 00000513, 02010113, 00008067, 00050513, 0000006B, 0000006F, 80000537, FF010113, 00050513, 00112623, F41FF0EF, 00050513, 0000006B, 0000006F, 00000006, 0000001C;

13
cpu_rv32i.srcs/sources_1/ip/data_ram/bubble_sort_data.coe Normal file
View File

@@ -0,0 +1,13 @@
MEMORY_INITIALIZATION_RADIX=16;
MEMORY_INITIALIZATION_VECTOR=
0000000a
00000008
00000041
00000002
00000012
00000036
00000006
00000009
00000005
0000005b
00000007

260
cpu_rv32i.srcs/sources_1/ip/data_ram/data_ram.xci Normal file
View File

@@ -0,0 +1,260 @@
{
"schema": "xilinx.com:schema:json_instance:1.0",
"ip_inst": {
"xci_name": "data_ram",
"component_reference": "xilinx.com:ip:blk_mem_gen:8.4",
"ip_revision": "5",
"gen_directory": "../../../../cpu_rv32i.gen/sources_1/ip/data_ram",
"parameters": {
"component_parameters": {
"Component_Name": [ { "value": "data_ram", "resolve_type": "user", "usage": "all" } ],
"Interface_Type": [ { "value": "Native", "resolve_type": "user", "usage": "all" } ],
"AXI_Type": [ { "value": "AXI4_Full", "resolve_type": "user", "usage": "all" } ],
"AXI_Slave_Type": [ { "value": "Memory_Slave", "resolve_type": "user", "usage": "all" } ],
"Use_AXI_ID": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"AXI_ID_Width": [ { "value": "4", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
"Memory_Type": [ { "value": "Single_Port_RAM", "resolve_type": "user", "usage": "all" } ],
"PRIM_type_to_Implement": [ { "value": "BRAM", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Enable_32bit_Address": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"ecctype": [ { "value": "No_ECC", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"ECC": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"EN_SLEEP_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"EN_DEEPSLEEP_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"EN_SHUTDOWN_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"EN_ECC_PIPE": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"RD_ADDR_CHNG_A": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"RD_ADDR_CHNG_B": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Use_Error_Injection_Pins": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Error_Injection_Type": [ { "value": "Single_Bit_Error_Injection", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Use_Byte_Write_Enable": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Byte_Size": [ { "value": "8", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Algorithm": [ { "value": "Minimum_Area", "resolve_type": "user", "usage": "all" } ],
"Primitive": [ { "value": "8kx2", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Assume_Synchronous_Clk": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Write_Width_A": [ { "value": "32", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Write_Depth_A": [ { "value": "65536", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Read_Width_A": [ { "value": "32", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Operating_Mode_A": [ { "value": "WRITE_FIRST", "resolve_type": "user", "usage": "all" } ],
"Enable_A": [ { "value": "Use_ENA_Pin", "resolve_type": "user", "usage": "all" } ],
"Write_Width_B": [ { "value": "32", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Read_Width_B": [ { "value": "32", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Operating_Mode_B": [ { "value": "WRITE_FIRST", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Enable_B": [ { "value": "Always_Enabled", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Register_PortA_Output_of_Memory_Primitives": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Register_PortA_Output_of_Memory_Core": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Use_REGCEA_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Register_PortB_Output_of_Memory_Primitives": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Register_PortB_Output_of_Memory_Core": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Use_REGCEB_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"register_porta_input_of_softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"register_portb_output_of_softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Pipeline_Stages": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Load_Init_File": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Coe_File": [ { "value": "raw_data.coe", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Fill_Remaining_Memory_Locations": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Remaining_Memory_Locations": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Use_RSTA_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Reset_Memory_Latch_A": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Reset_Priority_A": [ { "value": "CE", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Output_Reset_Value_A": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Use_RSTB_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Reset_Memory_Latch_B": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Reset_Priority_B": [ { "value": "CE", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Output_Reset_Value_B": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Reset_Type": [ { "value": "SYNC", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Additional_Inputs_for_Power_Estimation": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Port_A_Clock": [ { "value": "100", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Port_A_Write_Rate": [ { "value": "50", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Port_B_Clock": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Port_B_Write_Rate": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Port_A_Enable_Rate": [ { "value": "100", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Port_B_Enable_Rate": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Collision_Warnings": [ { "value": "ALL", "resolve_type": "user", "usage": "all" } ],
"Disable_Collision_Warnings": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Disable_Out_of_Range_Warnings": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"use_bram_block": [ { "value": "Stand_Alone", "resolve_type": "user", "usage": "all" } ],
"MEM_FILE": [ { "value": "no_mem_loaded", "resolve_type": "user", "usage": "all" } ],
"CTRL_ECC_ALGO": [ { "value": "NONE", "resolve_type": "user", "usage": "all" } ],
"EN_SAFETY_CKT": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"READ_LATENCY_A": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
"READ_LATENCY_B": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ]
},
"model_parameters": {
"C_FAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ],
"C_XDEVICEFAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ],
"C_ELABORATION_DIR": [ { "value": "./", "resolve_type": "generated", "usage": "all" } ],
"C_INTERFACE_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_AXI_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_AXI_SLAVE_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_BRAM_BLOCK": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ENABLE_32BIT_ADDRESS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CTRL_ECC_ALGO": [ { "value": "NONE", "resolve_type": "generated", "usage": "all" } ],
"C_HAS_AXI_ID": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_AXI_ID_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_MEM_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_BYTE_SIZE": [ { "value": "8", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ALGORITHM": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_PRIM_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_LOAD_INIT_FILE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_INIT_FILE_NAME": [ { "value": "data_ram.mif", "resolve_type": "generated", "usage": "all" } ],
"C_INIT_FILE": [ { "value": "data_ram.mem", "resolve_type": "generated", "usage": "all" } ],
"C_USE_DEFAULT_DATA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_DEFAULT_DATA": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ],
"C_HAS_RSTA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_RST_PRIORITY_A": [ { "value": "CE", "resolve_type": "generated", "usage": "all" } ],
"C_RSTRAM_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_INITA_VAL": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ],
"C_HAS_ENA": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_REGCEA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_BYTE_WEA": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_WEA_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_WRITE_MODE_A": [ { "value": "WRITE_FIRST", "resolve_type": "generated", "usage": "all" } ],
"C_WRITE_WIDTH_A": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_READ_WIDTH_A": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_WRITE_DEPTH_A": [ { "value": "65536", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_READ_DEPTH_A": [ { "value": "65536", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ADDRA_WIDTH": [ { "value": "16", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_RSTB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_RST_PRIORITY_B": [ { "value": "CE", "resolve_type": "generated", "usage": "all" } ],
"C_RSTRAM_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_INITB_VAL": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ],
"C_HAS_ENB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_REGCEB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_BYTE_WEB": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_WEB_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_WRITE_MODE_B": [ { "value": "WRITE_FIRST", "resolve_type": "generated", "usage": "all" } ],
"C_WRITE_WIDTH_B": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_READ_WIDTH_B": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_WRITE_DEPTH_B": [ { "value": "65536", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_READ_DEPTH_B": [ { "value": "65536", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ADDRB_WIDTH": [ { "value": "16", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_MEM_OUTPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_MEM_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_MUX_OUTPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_MUX_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_MUX_PIPELINE_STAGES": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_SOFTECC_INPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_SOFTECC_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_SOFTECC": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_ECC": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_EN_ECC_PIPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_READ_LATENCY_A": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_READ_LATENCY_B": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_INJECTERR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_SIM_COLLISION_CHECK": [ { "value": "ALL", "resolve_type": "generated", "usage": "all" } ],
"C_COMMON_CLK": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_DISABLE_WARN_BHV_COLL": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_EN_SLEEP_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_URAM": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_EN_RDADDRA_CHG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_EN_RDADDRB_CHG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_EN_DEEPSLEEP_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_EN_SHUTDOWN_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_EN_SAFETY_CKT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_DISABLE_WARN_BHV_RANGE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_COUNT_36K_BRAM": [ { "value": "64", "resolve_type": "generated", "usage": "all" } ],
"C_COUNT_18K_BRAM": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ],
"C_EST_POWER_SUMMARY": [ { "value": "Estimated Power for IP : 10.194002 mW", "resolve_type": "generated", "usage": "all" } ]
},
"project_parameters": {
"ARCHITECTURE": [ { "value": "artix7" } ],
"BASE_BOARD_PART": [ { "value": "" } ],
"BOARD_CONNECTIONS": [ { "value": "" } ],
"DEVICE": [ { "value": "xc7a100t" } ],
"PACKAGE": [ { "value": "csg324" } ],
"PREFHDL": [ { "value": "VERILOG" } ],
"SILICON_REVISION": [ { "value": "" } ],
"SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ],
"SPEEDGRADE": [ { "value": "-1" } ],
"STATIC_POWER": [ { "value": "" } ],
"TEMPERATURE_GRADE": [ { "value": "" } ],
"USE_RDI_CUSTOMIZATION": [ { "value": "TRUE" } ],
"USE_RDI_GENERATION": [ { "value": "TRUE" } ]
},
"runtime_parameters": {
"IPCONTEXT": [ { "value": "IP_Flow" } ],
"IPREVISION": [ { "value": "5" } ],
"MANAGED": [ { "value": "TRUE" } ],
"OUTPUTDIR": [ { "value": "../../../../cpu_rv32i.gen/sources_1/ip/data_ram" } ],
"SELECTEDSIMMODEL": [ { "value": "" } ],
"SHAREDDIR": [ { "value": "." } ],
"SWVERSION": [ { "value": "2022.2" } ],
"SYNTHESISFLOW": [ { "value": "OUT_OF_CONTEXT" } ]
}
},
"boundary": {
"ports": {
"clka": [ { "direction": "in", "driver_value": "0" } ],
"ena": [ { "direction": "in", "driver_value": "0" } ],
"wea": [ { "direction": "in", "size_left": "3", "size_right": "0", "driver_value": "0" } ],
"addra": [ { "direction": "in", "size_left": "15", "size_right": "0", "driver_value": "0" } ],
"dina": [ { "direction": "in", "size_left": "31", "size_right": "0", "driver_value": "0" } ],
"douta": [ { "direction": "out", "size_left": "31", "size_right": "0" } ]
},
"interfaces": {
"CLK.ACLK": {
"vlnv": "xilinx.com:signal:clock:1.0",
"abstraction_type": "xilinx.com:signal:clock_rtl:1.0",
"mode": "slave",
"parameters": {
"ASSOCIATED_BUSIF": [ { "value": "AXI_SLAVE_S_AXI:AXILite_SLAVE_S_AXI", "value_src": "constant", "usage": "all" } ],
"ASSOCIATED_RESET": [ { "value": "s_aresetn", "value_src": "constant", "usage": "all" } ],
"FREQ_HZ": [ { "value": "100000000", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"FREQ_TOLERANCE_HZ": [ { "value": "0", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_static_object": false } ],
"ASSOCIATED_PORT": [ { "value": "", "resolve_type": "generated", "is_static_object": false } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_static_object": false } ]
}
},
"RST.ARESETN": {
"vlnv": "xilinx.com:signal:reset:1.0",
"abstraction_type": "xilinx.com:signal:reset_rtl:1.0",
"mode": "slave",
"parameters": {
"POLARITY": [ { "value": "ACTIVE_LOW", "value_src": "constant", "usage": "all" } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_static_object": false } ]
}
},
"BRAM_PORTA": {
"vlnv": "xilinx.com:interface:bram:1.0",
"abstraction_type": "xilinx.com:interface:bram_rtl:1.0",
"mode": "slave",
"parameters": {
"MEM_SIZE": [ { "value": "8192", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"MEM_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"MEM_ECC": [ { "value": "NONE", "resolve_type": "generated", "is_static_object": false } ],
"MASTER_TYPE": [ { "value": "OTHER", "resolve_type": "generated", "is_static_object": false } ],
"READ_WRITE_MODE": [ { "value": "", "resolve_type": "generated", "is_static_object": false } ],
"READ_LATENCY": [ { "value": "1", "resolve_type": "generated", "format": "long", "is_static_object": false } ]
},
"port_maps": {
"ADDR": [ { "physical_name": "addra" } ],
"CLK": [ { "physical_name": "clka" } ],
"DIN": [ { "physical_name": "dina" } ],
"DOUT": [ { "physical_name": "douta" } ],
"EN": [ { "physical_name": "ena" } ],
"WE": [ { "physical_name": "wea" } ]
}
}
},
"memory_maps": {
"S_1": {
"address_blocks": {
"Mem0": {
"base_address": "0",
"range": "4096",
"usage": "memory",
"access": "read-write",
"parameters": {
"OFFSET_BASE_PARAM": [ { "value": "C_BASEADDR" } ],
"OFFSET_HIGH_PARAM": [ { "value": "C_HIGHADDR" } ]
}
}
}
}
}
}
}
}

4
cpu_rv32i.srcs/sources_1/ip/data_ram/raw_data.coe Normal file
View File

@@ -0,0 +1,4 @@
MEMORY_INITIALIZATION_RADIX=16;
MEMORY_INITIALIZATION_VECTOR=
00000003;

37
cpu_rv32i.srcs/sources_1/ip/instr_ram/bubble_sort_instr.coe Normal file
View File

@@ -0,0 +1,37 @@
MEMORY_INITIALIZATION_RADIX=16;
MEMORY_INITIALIZATION_VECTOR=
00002083
00008133
00106213
00406293
fff06313
04410663
00106193
00406393
00806413
0021b5b3
02058063
0003a483
00042503
00a4b5b3
00458c63
00a3a023
00942023
00c0006f
00610133
fc9ff06f
004181b3
005383b3
00540433
fc9ff06f
00102083
00202083
00302083
00402083
00502083
00602083
00702083
00802083
00902083
00a02083
0000006f

46
cpu_rv32i.srcs/sources_1/ip/instr_ram/bubble_sort代码.txt Normal file
View File

@@ -0,0 +1,46 @@
0: 00002083 lw x1 0 x0
4: 00008133 add x2 x1 x0
8: 00106213 ori x4 x0 1
c: 00406293 ori x5 x0 4
10: fff06313 ori x6 x0 -1
00000014 <L1>:
14: 04410663 beq x2 x4 76 <finish>
18: 00106193 ori x3 x0 1
1c: 00406393 ori x7 x0 4
20: 00806413 ori x8 x0 8
00000024 <L2>:
24: 0021b5b3 sltu x11 x3 x2
28: 02058063 beq x11 x0 32 <L3>
2c: 0003a483 lw x9 0 x7
30: 00042503 lw x10 0 x8
34: 00a4b5b3 sltu x11 x9 x10
38: 00458c63 beq x11 x4 24 <L4>
3c: 00a3a023 sw x10 0 x7
40: 00942023 sw x9 0 x8
44: 00c0006f jal x0 12 <L4>
00000048 <L3>:
48: 00610133 add x2 x2 x6
4c: fc9ff06f jal x0 -56 <L1>
00000050 <L4>:
50: 004181b3 add x3 x3 x4
54: 005383b3 add x7 x7 x5
58: 00540433 add x8 x8 x5
5c: fc9ff06f jal x0 -56 <L2>
00000060 <finish>:
60: 00102083 lw x1 1 x0
64: 00202083 lw x1 2 x0
68: 00302083 lw x1 3 x0
6c: 00402083 lw x1 4 x0
70: 00502083 lw x1 5 x0
74: 00602083 lw x1 6 x0
78: 00702083 lw x1 7 x0
7c: 00802083 lw x1 8 x0
80: 00902083 lw x1 9 x0
84: 00a02083 lw x1 10 x0
00000080 <real_finish>:
88: 0000006f jal x0 0 <real_finish>

260
cpu_rv32i.srcs/sources_1/ip/instr_ram/instr_ram.xci Normal file
View File

@@ -0,0 +1,260 @@
{
"schema": "xilinx.com:schema:json_instance:1.0",
"ip_inst": {
"xci_name": "instr_ram",
"component_reference": "xilinx.com:ip:blk_mem_gen:8.4",
"ip_revision": "5",
"gen_directory": "../../../../cpu_rv32i.gen/sources_1/ip/instr_ram_1",
"parameters": {
"component_parameters": {
"Component_Name": [ { "value": "instr_ram", "resolve_type": "user", "usage": "all" } ],
"Interface_Type": [ { "value": "Native", "resolve_type": "user", "usage": "all" } ],
"AXI_Type": [ { "value": "AXI4_Full", "resolve_type": "user", "usage": "all" } ],
"AXI_Slave_Type": [ { "value": "Memory_Slave", "resolve_type": "user", "usage": "all" } ],
"Use_AXI_ID": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"AXI_ID_Width": [ { "value": "4", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
"Memory_Type": [ { "value": "Single_Port_RAM", "resolve_type": "user", "usage": "all" } ],
"PRIM_type_to_Implement": [ { "value": "BRAM", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Enable_32bit_Address": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"ecctype": [ { "value": "No_ECC", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"ECC": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"EN_SLEEP_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"EN_DEEPSLEEP_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"EN_SHUTDOWN_PIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"EN_ECC_PIPE": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"RD_ADDR_CHNG_A": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"RD_ADDR_CHNG_B": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Use_Error_Injection_Pins": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Error_Injection_Type": [ { "value": "Single_Bit_Error_Injection", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Use_Byte_Write_Enable": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Byte_Size": [ { "value": "8", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Algorithm": [ { "value": "Minimum_Area", "resolve_type": "user", "usage": "all" } ],
"Primitive": [ { "value": "8kx2", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Assume_Synchronous_Clk": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Write_Width_A": [ { "value": "32", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Write_Depth_A": [ { "value": "65536", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Read_Width_A": [ { "value": "32", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Operating_Mode_A": [ { "value": "WRITE_FIRST", "resolve_type": "user", "usage": "all" } ],
"Enable_A": [ { "value": "Use_ENA_Pin", "resolve_type": "user", "usage": "all" } ],
"Write_Width_B": [ { "value": "32", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Read_Width_B": [ { "value": "32", "value_src": "user", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Operating_Mode_B": [ { "value": "WRITE_FIRST", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Enable_B": [ { "value": "Always_Enabled", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Register_PortA_Output_of_Memory_Primitives": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Register_PortA_Output_of_Memory_Core": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Use_REGCEA_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Register_PortB_Output_of_Memory_Primitives": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Register_PortB_Output_of_Memory_Core": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Use_REGCEB_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"register_porta_input_of_softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"register_portb_output_of_softecc": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Pipeline_Stages": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Load_Init_File": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Coe_File": [ { "value": "raw_instr.coe", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"Fill_Remaining_Memory_Locations": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Remaining_Memory_Locations": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Use_RSTA_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Reset_Memory_Latch_A": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Reset_Priority_A": [ { "value": "CE", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Output_Reset_Value_A": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Use_RSTB_Pin": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Reset_Memory_Latch_B": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"Reset_Priority_B": [ { "value": "CE", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Output_Reset_Value_B": [ { "value": "0", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Reset_Type": [ { "value": "SYNC", "resolve_type": "user", "enabled": false, "usage": "all" } ],
"Additional_Inputs_for_Power_Estimation": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Port_A_Clock": [ { "value": "100", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Port_A_Write_Rate": [ { "value": "50", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Port_B_Clock": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Port_B_Write_Rate": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Port_A_Enable_Rate": [ { "value": "100", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Port_B_Enable_Rate": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "all" } ],
"Collision_Warnings": [ { "value": "ALL", "resolve_type": "user", "usage": "all" } ],
"Disable_Collision_Warnings": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Disable_Out_of_Range_Warnings": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"use_bram_block": [ { "value": "Stand_Alone", "resolve_type": "user", "usage": "all" } ],
"MEM_FILE": [ { "value": "no_mem_loaded", "resolve_type": "user", "usage": "all" } ],
"CTRL_ECC_ALGO": [ { "value": "NONE", "resolve_type": "user", "usage": "all" } ],
"EN_SAFETY_CKT": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
"READ_LATENCY_A": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
"READ_LATENCY_B": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ]
},
"model_parameters": {
"C_FAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ],
"C_XDEVICEFAMILY": [ { "value": "artix7", "resolve_type": "generated", "usage": "all" } ],
"C_ELABORATION_DIR": [ { "value": "./", "resolve_type": "generated", "usage": "all" } ],
"C_INTERFACE_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_AXI_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_AXI_SLAVE_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_BRAM_BLOCK": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ENABLE_32BIT_ADDRESS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CTRL_ECC_ALGO": [ { "value": "NONE", "resolve_type": "generated", "usage": "all" } ],
"C_HAS_AXI_ID": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_AXI_ID_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_MEM_TYPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_BYTE_SIZE": [ { "value": "8", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ALGORITHM": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_PRIM_TYPE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_LOAD_INIT_FILE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_INIT_FILE_NAME": [ { "value": "instr_ram.mif", "resolve_type": "generated", "usage": "all" } ],
"C_INIT_FILE": [ { "value": "instr_ram.mem", "resolve_type": "generated", "usage": "all" } ],
"C_USE_DEFAULT_DATA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_DEFAULT_DATA": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ],
"C_HAS_RSTA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_RST_PRIORITY_A": [ { "value": "CE", "resolve_type": "generated", "usage": "all" } ],
"C_RSTRAM_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_INITA_VAL": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ],
"C_HAS_ENA": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_REGCEA": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_BYTE_WEA": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_WEA_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_WRITE_MODE_A": [ { "value": "WRITE_FIRST", "resolve_type": "generated", "usage": "all" } ],
"C_WRITE_WIDTH_A": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_READ_WIDTH_A": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_WRITE_DEPTH_A": [ { "value": "65536", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_READ_DEPTH_A": [ { "value": "65536", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ADDRA_WIDTH": [ { "value": "16", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_RSTB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_RST_PRIORITY_B": [ { "value": "CE", "resolve_type": "generated", "usage": "all" } ],
"C_RSTRAM_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_INITB_VAL": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ],
"C_HAS_ENB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_REGCEB": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_BYTE_WEB": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_WEB_WIDTH": [ { "value": "4", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_WRITE_MODE_B": [ { "value": "WRITE_FIRST", "resolve_type": "generated", "usage": "all" } ],
"C_WRITE_WIDTH_B": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_READ_WIDTH_B": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_WRITE_DEPTH_B": [ { "value": "65536", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_READ_DEPTH_B": [ { "value": "65536", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ADDRB_WIDTH": [ { "value": "16", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_MEM_OUTPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_MEM_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_MUX_OUTPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_MUX_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_MUX_PIPELINE_STAGES": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_SOFTECC_INPUT_REGS_A": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_SOFTECC_OUTPUT_REGS_B": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_SOFTECC": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_ECC": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_EN_ECC_PIPE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_READ_LATENCY_A": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_READ_LATENCY_B": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_HAS_INJECTERR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_SIM_COLLISION_CHECK": [ { "value": "ALL", "resolve_type": "generated", "usage": "all" } ],
"C_COMMON_CLK": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_DISABLE_WARN_BHV_COLL": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_EN_SLEEP_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_URAM": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_EN_RDADDRA_CHG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_EN_RDADDRB_CHG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_EN_DEEPSLEEP_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_EN_SHUTDOWN_PIN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_EN_SAFETY_CKT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_DISABLE_WARN_BHV_RANGE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_COUNT_36K_BRAM": [ { "value": "64", "resolve_type": "generated", "usage": "all" } ],
"C_COUNT_18K_BRAM": [ { "value": "0", "resolve_type": "generated", "usage": "all" } ],
"C_EST_POWER_SUMMARY": [ { "value": "Estimated Power for IP : 10.194002 mW", "resolve_type": "generated", "usage": "all" } ]
},
"project_parameters": {
"ARCHITECTURE": [ { "value": "artix7" } ],
"BASE_BOARD_PART": [ { "value": "" } ],
"BOARD_CONNECTIONS": [ { "value": "" } ],
"DEVICE": [ { "value": "xc7a100t" } ],
"PACKAGE": [ { "value": "csg324" } ],
"PREFHDL": [ { "value": "VERILOG" } ],
"SILICON_REVISION": [ { "value": "" } ],
"SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ],
"SPEEDGRADE": [ { "value": "-1" } ],
"STATIC_POWER": [ { "value": "" } ],
"TEMPERATURE_GRADE": [ { "value": "" } ],
"USE_RDI_CUSTOMIZATION": [ { "value": "TRUE" } ],
"USE_RDI_GENERATION": [ { "value": "TRUE" } ]
},
"runtime_parameters": {
"IPCONTEXT": [ { "value": "IP_Flow" } ],
"IPREVISION": [ { "value": "5" } ],
"MANAGED": [ { "value": "TRUE" } ],
"OUTPUTDIR": [ { "value": "../../../../cpu_rv32i.gen/sources_1/ip/instr_ram_1" } ],
"SELECTEDSIMMODEL": [ { "value": "" } ],
"SHAREDDIR": [ { "value": "." } ],
"SWVERSION": [ { "value": "2022.2" } ],
"SYNTHESISFLOW": [ { "value": "OUT_OF_CONTEXT" } ]
}
},
"boundary": {
"ports": {
"clka": [ { "direction": "in", "driver_value": "0" } ],
"ena": [ { "direction": "in", "driver_value": "0" } ],
"wea": [ { "direction": "in", "size_left": "3", "size_right": "0", "driver_value": "0" } ],
"addra": [ { "direction": "in", "size_left": "15", "size_right": "0", "driver_value": "0" } ],
"dina": [ { "direction": "in", "size_left": "31", "size_right": "0", "driver_value": "0" } ],
"douta": [ { "direction": "out", "size_left": "31", "size_right": "0" } ]
},
"interfaces": {
"CLK.ACLK": {
"vlnv": "xilinx.com:signal:clock:1.0",
"abstraction_type": "xilinx.com:signal:clock_rtl:1.0",
"mode": "slave",
"parameters": {
"ASSOCIATED_BUSIF": [ { "value": "AXI_SLAVE_S_AXI:AXILite_SLAVE_S_AXI", "value_src": "constant", "usage": "all" } ],
"ASSOCIATED_RESET": [ { "value": "s_aresetn", "value_src": "constant", "usage": "all" } ],
"FREQ_HZ": [ { "value": "100000000", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"FREQ_TOLERANCE_HZ": [ { "value": "0", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_static_object": false } ],
"ASSOCIATED_PORT": [ { "value": "", "resolve_type": "generated", "is_static_object": false } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_static_object": false } ]
}
},
"RST.ARESETN": {
"vlnv": "xilinx.com:signal:reset:1.0",
"abstraction_type": "xilinx.com:signal:reset_rtl:1.0",
"mode": "slave",
"parameters": {
"POLARITY": [ { "value": "ACTIVE_LOW", "value_src": "constant", "usage": "all" } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_static_object": false } ]
}
},
"BRAM_PORTA": {
"vlnv": "xilinx.com:interface:bram:1.0",
"abstraction_type": "xilinx.com:interface:bram_rtl:1.0",
"mode": "slave",
"parameters": {
"MEM_SIZE": [ { "value": "8192", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"MEM_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "is_static_object": false } ],
"MEM_ECC": [ { "value": "NONE", "resolve_type": "generated", "is_static_object": false } ],
"MASTER_TYPE": [ { "value": "OTHER", "resolve_type": "generated", "is_static_object": false } ],
"READ_WRITE_MODE": [ { "value": "", "resolve_type": "generated", "is_static_object": false } ],
"READ_LATENCY": [ { "value": "1", "resolve_type": "generated", "format": "long", "is_static_object": false } ]
},
"port_maps": {
"ADDR": [ { "physical_name": "addra" } ],
"CLK": [ { "physical_name": "clka" } ],
"DIN": [ { "physical_name": "dina" } ],
"DOUT": [ { "physical_name": "douta" } ],
"EN": [ { "physical_name": "ena" } ],
"WE": [ { "physical_name": "wea" } ]
}
}
},
"memory_maps": {
"S_1": {
"address_blocks": {
"Mem0": {
"base_address": "0",
"range": "4096",
"usage": "memory",
"access": "read-write",
"parameters": {
"OFFSET_BASE_PARAM": [ { "value": "C_BASEADDR" } ],
"OFFSET_HIGH_PARAM": [ { "value": "C_HIGHADDR" } ]
}
}
}
}
}
}
}
}

14
cpu_rv32i.srcs/sources_1/ip/instr_ram/raw 测试代码.txt Normal file
View File

@@ -0,0 +1,14 @@
lw x3, 0x0(x0) # 00002183 读取主存地址0x0000处的n到x3
add x3, x3, x3 # 003181B3
slt x4, x0 ,x3 # 00302233 将x4的值通过比较指令赋为 1
ori x5, x1, 0x1 # 00106293 x5内容（循环变量i）为1
ori x2, x1, 0x1 # 00106113 x2内容（循环增量）为1
loop:
add x4, x4, x5 # 00520233 将i加到x4（累加）
beq x5, x3, finish # 00328663 若x5=n，则跳出循环
add x5, x5, x2 # 002282b3 x5=x5+1
jal x0, loop # FF5FF06F 无条件跳转到loop执行
finish:
sw x4, 0x4(x0) # 00402223 将累加结果保存到0x0001单元
end:
jal x0, end # 0000006F 无条件跳转到end执行

14
cpu_rv32i.srcs/sources_1/ip/instr_ram/raw_instr.coe Normal file
View File

@@ -0,0 +1,14 @@
MEMORY_INITIALIZATION_RADIX=16;
MEMORY_INITIALIZATION_VECTOR=
00002183,
003181B3,
00302233,
00106293,
00106113,
00520233,
00328663,
002282b3,
FF5FF06F,
00402223,
0000006F;

20
cpu_rv32i.srcs/sources_1/ip/instr_ram/test.coe Normal file
View File

@@ -0,0 +1,20 @@
MEMORY_INITIALIZATION_RADIX=16;
MEMORY_INITIALIZATION_VECTOR=
80100537,
01300593,
3A050513,
FFF00813,
00000713,
00050793,
02B75263,
0007A683,
0047A603,
00170713,
00D65663,
00C7A023,
00D7A223,
00478793,
FEB742E3,
FFF58593,
FD0598E3,
00008067;

657
cpu_rv32i.srcs/sources_1/ip/pll/pll.xci Normal file
View File

@@ -0,0 +1,657 @@
{
"schema": "xilinx.com:schema:json_instance:1.0",
"ip_inst": {
"xci_name": "pll",
"component_reference": "xilinx.com:ip:clk_wiz:6.0",
"ip_revision": "11",
"gen_directory": "../../../../cpu_rv32i.gen/sources_1/ip/pll",
"parameters": {
"component_parameters": {
"Component_Name": [ { "value": "pll", "resolve_type": "user", "usage": "all" } ],
"USER_CLK_FREQ0": [ { "value": "100.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"USER_CLK_FREQ1": [ { "value": "100.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"USER_CLK_FREQ2": [ { "value": "100.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"USER_CLK_FREQ3": [ { "value": "100.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"ENABLE_CLOCK_MONITOR": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"OPTIMIZE_CLOCKING_STRUCTURE_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"ENABLE_USER_CLOCK0": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"ENABLE_USER_CLOCK1": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"ENABLE_USER_CLOCK2": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"ENABLE_USER_CLOCK3": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Enable_PLL0": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"Enable_PLL1": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"REF_CLK_FREQ": [ { "value": "100.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PRECISION": [ { "value": "1", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PRIMITIVE": [ { "value": "MMCM", "resolve_type": "user", "usage": "all" } ],
"PRIMTYPE_SEL": [ { "value": "mmcm_adv", "resolve_type": "user", "usage": "all" } ],
"CLOCK_MGR_TYPE": [ { "value": "auto", "resolve_type": "user", "usage": "all" } ],
"USE_FREQ_SYNTH": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"USE_SPREAD_SPECTRUM": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"USE_PHASE_ALIGNMENT": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"USE_MIN_POWER": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"USE_DYN_PHASE_SHIFT": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"USE_DYN_RECONFIG": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"JITTER_SEL": [ { "value": "No_Jitter", "resolve_type": "user", "usage": "all" } ],
"PRIM_IN_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PRIM_IN_TIMEPERIOD": [ { "value": "10.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"IN_FREQ_UNITS": [ { "value": "Units_MHz", "resolve_type": "user", "usage": "all" } ],
"PHASESHIFT_MODE": [ { "value": "WAVEFORM", "resolve_type": "user", "usage": "all" } ],
"IN_JITTER_UNITS": [ { "value": "Units_UI", "resolve_type": "user", "usage": "all" } ],
"RELATIVE_INCLK": [ { "value": "REL_PRIMARY", "resolve_type": "user", "usage": "all" } ],
"USE_INCLK_SWITCHOVER": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"SECONDARY_IN_FREQ": [ { "value": "100.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
"SECONDARY_IN_TIMEPERIOD": [ { "value": "10.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"SECONDARY_PORT": [ { "value": "clk_in2", "resolve_type": "user", "usage": "all" } ],
"SECONDARY_SOURCE": [ { "value": "Single_ended_clock_capable_pin", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
"JITTER_OPTIONS": [ { "value": "UI", "resolve_type": "user", "usage": "all" } ],
"CLKIN1_UI_JITTER": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKIN2_UI_JITTER": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PRIM_IN_JITTER": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ],
"SECONDARY_IN_JITTER": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKIN1_JITTER_PS": [ { "value": "100.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKIN2_JITTER_PS": [ { "value": "166.66", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT1_USED": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUT2_USED": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUT3_USED": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUT4_USED": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUT5_USED": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUT6_USED": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUT7_USED": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"NUM_OUT_CLKS": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"CLK_OUT1_USE_FINE_PS_GUI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLK_OUT2_USE_FINE_PS_GUI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLK_OUT3_USE_FINE_PS_GUI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLK_OUT4_USE_FINE_PS_GUI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLK_OUT5_USE_FINE_PS_GUI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLK_OUT6_USE_FINE_PS_GUI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLK_OUT7_USE_FINE_PS_GUI": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"PRIMARY_PORT": [ { "value": "clk_in1", "resolve_type": "user", "usage": "all" } ],
"CLK_OUT1_PORT": [ { "value": "clk_out1", "resolve_type": "user", "usage": "all" } ],
"CLK_OUT2_PORT": [ { "value": "clk_out2", "resolve_type": "user", "usage": "all" } ],
"CLK_OUT3_PORT": [ { "value": "clk_out3", "resolve_type": "user", "usage": "all" } ],
"CLK_OUT4_PORT": [ { "value": "clk_out4", "resolve_type": "user", "usage": "all" } ],
"CLK_OUT5_PORT": [ { "value": "clk_out5", "resolve_type": "user", "usage": "all" } ],
"CLK_OUT6_PORT": [ { "value": "clk_out6", "resolve_type": "user", "usage": "all" } ],
"CLK_OUT7_PORT": [ { "value": "clk_out7", "resolve_type": "user", "usage": "all" } ],
"DADDR_PORT": [ { "value": "daddr", "resolve_type": "user", "usage": "all" } ],
"DCLK_PORT": [ { "value": "dclk", "resolve_type": "user", "usage": "all" } ],
"DRDY_PORT": [ { "value": "drdy", "resolve_type": "user", "usage": "all" } ],
"DWE_PORT": [ { "value": "dwe", "resolve_type": "user", "usage": "all" } ],
"DIN_PORT": [ { "value": "din", "resolve_type": "user", "usage": "all" } ],
"DOUT_PORT": [ { "value": "dout", "resolve_type": "user", "usage": "all" } ],
"DEN_PORT": [ { "value": "den", "resolve_type": "user", "usage": "all" } ],
"PSCLK_PORT": [ { "value": "psclk", "resolve_type": "user", "usage": "all" } ],
"PSEN_PORT": [ { "value": "psen", "resolve_type": "user", "usage": "all" } ],
"PSINCDEC_PORT": [ { "value": "psincdec", "resolve_type": "user", "usage": "all" } ],
"PSDONE_PORT": [ { "value": "psdone", "resolve_type": "user", "usage": "all" } ],
"CLKOUT1_REQUESTED_OUT_FREQ": [ { "value": "50.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT1_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT1_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT2_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT2_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT2_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT3_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT3_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT3_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT4_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT4_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT4_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT5_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT5_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT5_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT6_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT6_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT6_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT7_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT7_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT7_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"USE_MAX_I_JITTER": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"USE_MIN_O_JITTER": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUT1_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUT2_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUT3_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUT4_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUT5_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUT6_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUT7_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"PRIM_SOURCE": [ { "value": "Single_ended_clock_capable_pin", "resolve_type": "user", "usage": "all" } ],
"CLKOUT1_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ],
"CLKOUT2_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ],
"CLKOUT3_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ],
"CLKOUT4_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ],
"CLKOUT5_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ],
"CLKOUT6_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ],
"CLKOUT7_DRIVES": [ { "value": "BUFG", "resolve_type": "user", "usage": "all" } ],
"FEEDBACK_SOURCE": [ { "value": "FDBK_AUTO", "resolve_type": "user", "usage": "all" } ],
"CLKFB_IN_SIGNALING": [ { "value": "SINGLE", "resolve_type": "user", "usage": "all" } ],
"CLKFB_IN_PORT": [ { "value": "clkfb_in", "resolve_type": "user", "usage": "all" } ],
"CLKFB_IN_P_PORT": [ { "value": "clkfb_in_p", "resolve_type": "user", "usage": "all" } ],
"CLKFB_IN_N_PORT": [ { "value": "clkfb_in_n", "resolve_type": "user", "usage": "all" } ],
"CLKFB_OUT_PORT": [ { "value": "clkfb_out", "resolve_type": "user", "usage": "all" } ],
"CLKFB_OUT_P_PORT": [ { "value": "clkfb_out_p", "resolve_type": "user", "usage": "all" } ],
"CLKFB_OUT_N_PORT": [ { "value": "clkfb_out_n", "resolve_type": "user", "usage": "all" } ],
"PLATFORM": [ { "value": "UNKNOWN", "resolve_type": "user", "usage": "all" } ],
"SUMMARY_STRINGS": [ { "value": "empty", "resolve_type": "user", "usage": "all" } ],
"USE_LOCKED": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CALC_DONE": [ { "value": "empty", "resolve_type": "user", "usage": "all" } ],
"USE_RESET": [ { "value": "false", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"USE_POWER_DOWN": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"USE_STATUS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"USE_FREEZE": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"USE_CLK_VALID": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"USE_INCLK_STOPPED": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"USE_CLKFB_STOPPED": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"RESET_PORT": [ { "value": "reset", "resolve_type": "user", "usage": "all" } ],
"LOCKED_PORT": [ { "value": "locked", "resolve_type": "user", "usage": "all" } ],
"POWER_DOWN_PORT": [ { "value": "power_down", "resolve_type": "user", "usage": "all" } ],
"CLK_VALID_PORT": [ { "value": "CLK_VALID", "resolve_type": "user", "usage": "all" } ],
"STATUS_PORT": [ { "value": "STATUS", "resolve_type": "user", "usage": "all" } ],
"CLK_IN_SEL_PORT": [ { "value": "clk_in_sel", "resolve_type": "user", "usage": "all" } ],
"INPUT_CLK_STOPPED_PORT": [ { "value": "input_clk_stopped", "resolve_type": "user", "usage": "all" } ],
"CLKFB_STOPPED_PORT": [ { "value": "clkfb_stopped", "resolve_type": "user", "usage": "all" } ],
"SS_MODE": [ { "value": "CENTER_HIGH", "resolve_type": "user", "usage": "all" } ],
"SS_MOD_FREQ": [ { "value": "250", "resolve_type": "user", "format": "float", "usage": "all" } ],
"SS_MOD_TIME": [ { "value": "0.004", "resolve_type": "user", "format": "float", "usage": "all" } ],
"OVERRIDE_MMCM": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_NOTES": [ { "value": "None", "resolve_type": "user", "usage": "all" } ],
"MMCM_DIVCLK_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"MMCM_BANDWIDTH": [ { "value": "OPTIMIZED", "resolve_type": "user", "usage": "all" } ],
"MMCM_CLKFBOUT_MULT_F": [ { "value": "10.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKFBOUT_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKFBOUT_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_CLKIN1_PERIOD": [ { "value": "10.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKIN2_PERIOD": [ { "value": "10.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT4_CASCADE": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_CLOCK_HOLD": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_COMPENSATION": [ { "value": "ZHOLD", "resolve_type": "user", "usage": "all" } ],
"MMCM_REF_JITTER1": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_REF_JITTER2": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_STARTUP_WAIT": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_CLKOUT0_DIVIDE_F": [ { "value": "20.000", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT0_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT0_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT0_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_CLKOUT1_DIVIDE": [ { "value": "1", "value_src": "user", "resolve_type": "user", "format": "long", "usage": "all" } ],
"MMCM_CLKOUT1_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT1_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_CLKOUT2_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"MMCM_CLKOUT2_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT2_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_CLKOUT3_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"MMCM_CLKOUT3_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT3_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_CLKOUT4_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"MMCM_CLKOUT4_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT4_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_CLKOUT5_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"MMCM_CLKOUT5_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT5_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT5_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"MMCM_CLKOUT6_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"MMCM_CLKOUT6_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT6_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"MMCM_CLKOUT6_USE_FINE_PS": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"OVERRIDE_PLL": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"PLL_NOTES": [ { "value": "None", "resolve_type": "user", "usage": "all" } ],
"PLL_BANDWIDTH": [ { "value": "OPTIMIZED", "resolve_type": "user", "usage": "all" } ],
"PLL_CLKFBOUT_MULT": [ { "value": "4", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PLL_CLKFBOUT_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PLL_CLK_FEEDBACK": [ { "value": "CLKFBOUT", "resolve_type": "user", "usage": "all" } ],
"PLL_DIVCLK_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PLL_CLKIN_PERIOD": [ { "value": "10.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PLL_COMPENSATION": [ { "value": "SYSTEM_SYNCHRONOUS", "resolve_type": "user", "usage": "all" } ],
"PLL_REF_JITTER": [ { "value": "0.010", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PLL_CLKOUT0_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PLL_CLKOUT0_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PLL_CLKOUT0_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PLL_CLKOUT1_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PLL_CLKOUT1_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PLL_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PLL_CLKOUT2_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PLL_CLKOUT2_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PLL_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PLL_CLKOUT3_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PLL_CLKOUT3_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PLL_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PLL_CLKOUT4_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PLL_CLKOUT4_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PLL_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PLL_CLKOUT5_DIVIDE": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"PLL_CLKOUT5_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "user", "format": "float", "usage": "all" } ],
"PLL_CLKOUT5_PHASE": [ { "value": "0.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"RESET_TYPE": [ { "value": "ACTIVE_HIGH", "resolve_type": "user", "usage": "all" } ],
"USE_SAFE_CLOCK_STARTUP": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"USE_CLOCK_SEQUENCING": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUT1_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"CLKOUT2_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"CLKOUT3_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"CLKOUT4_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"CLKOUT5_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"CLKOUT6_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"CLKOUT7_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
"USE_BOARD_FLOW": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLK_IN1_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ],
"CLK_IN2_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ],
"DIFF_CLK_IN1_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ],
"DIFF_CLK_IN2_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ],
"AUTO_PRIMITIVE": [ { "value": "MMCM", "resolve_type": "user", "usage": "all" } ],
"RESET_BOARD_INTERFACE": [ { "value": "Custom", "resolve_type": "user", "usage": "all" } ],
"ENABLE_CDDC": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CDDCDONE_PORT": [ { "value": "cddcdone", "resolve_type": "user", "usage": "all" } ],
"CDDCREQ_PORT": [ { "value": "cddcreq", "resolve_type": "user", "usage": "all" } ],
"ENABLE_CLKOUTPHY": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"CLKOUTPHY_REQUESTED_FREQ": [ { "value": "600.000", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT1_JITTER": [ { "value": "151.636", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT1_PHASE_ERROR": [ { "value": "98.575", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT2_JITTER": [ { "value": "130.958", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT2_PHASE_ERROR": [ { "value": "98.575", "value_src": "user", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT3_JITTER": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT3_PHASE_ERROR": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT4_JITTER": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT4_PHASE_ERROR": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT5_JITTER": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT5_PHASE_ERROR": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT6_JITTER": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT6_PHASE_ERROR": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT7_JITTER": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"CLKOUT7_PHASE_ERROR": [ { "value": "0.0", "resolve_type": "user", "format": "float", "usage": "all" } ],
"INPUT_MODE": [ { "value": "frequency", "resolve_type": "user", "usage": "all" } ],
"INTERFACE_SELECTION": [ { "value": "Enable_AXI", "resolve_type": "user", "usage": "all" } ],
"AXI_DRP": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
"PHASE_DUTY_CONFIG": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ]
},
"model_parameters": {
"C_CLKOUT2_USED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USER_CLK_FREQ0": [ { "value": "100.0", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_AUTO_PRIMITIVE": [ { "value": "MMCM", "resolve_type": "generated", "usage": "all" } ],
"C_USER_CLK_FREQ1": [ { "value": "100.0", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_USER_CLK_FREQ2": [ { "value": "100.0", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_USER_CLK_FREQ3": [ { "value": "100.0", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_ENABLE_CLOCK_MONITOR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ENABLE_USER_CLOCK0": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ENABLE_USER_CLOCK1": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ENABLE_USER_CLOCK2": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_ENABLE_USER_CLOCK3": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_Enable_PLL0": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_Enable_PLL1": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_REF_CLK_FREQ": [ { "value": "100.0", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PRECISION": [ { "value": "1", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT3_USED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CLKOUT4_USED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CLKOUT5_USED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CLKOUT6_USED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CLKOUT7_USED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_CLKOUT1_BAR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_CLKOUT2_BAR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_CLKOUT3_BAR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_CLKOUT4_BAR": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"c_component_name": [ { "value": "pll", "resolve_type": "generated", "usage": "all" } ],
"C_PLATFORM": [ { "value": "UNKNOWN", "resolve_type": "generated", "usage": "all" } ],
"C_USE_FREQ_SYNTH": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_PHASE_ALIGNMENT": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_PRIM_IN_JITTER": [ { "value": "0.010", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_SECONDARY_IN_JITTER": [ { "value": "0.010", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_JITTER_SEL": [ { "value": "No_Jitter", "resolve_type": "generated", "usage": "all" } ],
"C_USE_MIN_POWER": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_MIN_O_JITTER": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_MAX_I_JITTER": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_DYN_PHASE_SHIFT": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_OPTIMIZE_CLOCKING_STRUCTURE_EN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_INCLK_SWITCHOVER": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_DYN_RECONFIG": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_SPREAD_SPECTRUM": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_FAST_SIMULATION": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_PRIMTYPE_SEL": [ { "value": "AUTO", "resolve_type": "generated", "usage": "all" } ],
"C_USE_CLK_VALID": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_PRIM_IN_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PRIM_IN_TIMEPERIOD": [ { "value": "10.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_IN_FREQ_UNITS": [ { "value": "Units_MHz", "resolve_type": "generated", "usage": "all" } ],
"C_SECONDARY_IN_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_SECONDARY_IN_TIMEPERIOD": [ { "value": "10.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_FEEDBACK_SOURCE": [ { "value": "FDBK_AUTO", "resolve_type": "generated", "usage": "all" } ],
"C_PRIM_SOURCE": [ { "value": "Single_ended_clock_capable_pin", "resolve_type": "generated", "usage": "all" } ],
"C_PHASESHIFT_MODE": [ { "value": "WAVEFORM", "resolve_type": "generated", "usage": "all" } ],
"C_SECONDARY_SOURCE": [ { "value": "Single_ended_clock_capable_pin", "resolve_type": "generated", "usage": "all" } ],
"C_CLKFB_IN_SIGNALING": [ { "value": "SINGLE", "resolve_type": "generated", "usage": "all" } ],
"C_USE_RESET": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_RESET_LOW": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_LOCKED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_INCLK_STOPPED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_CLKFB_STOPPED": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_POWER_DOWN": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_STATUS": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_FREEZE": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_NUM_OUT_CLKS": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CLKOUT1_DRIVES": [ { "value": "BUFG", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT2_DRIVES": [ { "value": "BUFG", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT3_DRIVES": [ { "value": "BUFG", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT4_DRIVES": [ { "value": "BUFG", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT5_DRIVES": [ { "value": "BUFG", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT6_DRIVES": [ { "value": "BUFG", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT7_DRIVES": [ { "value": "BUFG", "resolve_type": "generated", "usage": "all" } ],
"C_INCLK_SUM_ROW0": [ { "value": "Input Clock Freq (MHz) Input Jitter (UI)", "resolve_type": "generated", "usage": "all" } ],
"C_INCLK_SUM_ROW1": [ { "value": "__primary_________100.000____________0.010", "resolve_type": "generated", "usage": "all" } ],
"C_INCLK_SUM_ROW2": [ { "value": "no_secondary_input_clock ", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW0A": [ { "value": " Output Output Phase Duty Cycle Pk-to-Pk Phase", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW0B": [ { "value": " Clock Freq (MHz) (degrees) (%) Jitter (ps) Error (ps)", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW1": [ { "value": "clk_out1__50.00000______0.000______50.0______151.636_____98.575", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW2": [ { "value": "no_CLK_OUT2_output", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW3": [ { "value": "no_CLK_OUT3_output", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW4": [ { "value": "no_CLK_OUT4_output", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW5": [ { "value": "no_CLK_OUT5_output", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW6": [ { "value": "no_CLK_OUT6_output", "resolve_type": "generated", "usage": "all" } ],
"C_OUTCLK_SUM_ROW7": [ { "value": "no_CLK_OUT7_output", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT1_REQUESTED_OUT_FREQ": [ { "value": "50.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT2_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT3_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT4_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT5_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT6_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT7_REQUESTED_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT1_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT2_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT3_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT4_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT5_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT6_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT7_REQUESTED_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT1_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT2_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT3_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT4_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT5_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT6_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT7_REQUESTED_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT1_OUT_FREQ": [ { "value": "50.00000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT2_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT3_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT4_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT5_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT6_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT7_OUT_FREQ": [ { "value": "100.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT5_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT6_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT7_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT1_DUTY_CYCLE": [ { "value": "50.0", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT2_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT3_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT4_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT5_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT6_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKOUT7_DUTY_CYCLE": [ { "value": "50.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_USE_SAFE_CLOCK_STARTUP": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_USE_CLOCK_SEQUENCING": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CLKOUT1_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CLKOUT2_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CLKOUT3_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CLKOUT4_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CLKOUT5_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CLKOUT6_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CLKOUT7_SEQUENCE_NUMBER": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_MMCM_NOTES": [ { "value": "None", "resolve_type": "generated", "usage": "all" } ],
"C_MMCM_BANDWIDTH": [ { "value": "OPTIMIZED", "resolve_type": "generated", "usage": "all" } ],
"C_MMCM_CLKFBOUT_MULT_F": [ { "value": "10.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKIN1_PERIOD": [ { "value": "10.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKIN2_PERIOD": [ { "value": "10.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT4_CASCADE": [ { "value": "FALSE", "resolve_type": "generated", "format": "bool", "usage": "all" } ],
"C_MMCM_CLOCK_HOLD": [ { "value": "FALSE", "resolve_type": "generated", "format": "bool", "usage": "all" } ],
"C_MMCM_COMPENSATION": [ { "value": "ZHOLD", "resolve_type": "generated", "usage": "all" } ],
"C_MMCM_DIVCLK_DIVIDE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_MMCM_REF_JITTER1": [ { "value": "0.010", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_REF_JITTER2": [ { "value": "0.010", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_STARTUP_WAIT": [ { "value": "FALSE", "resolve_type": "generated", "usage": "all" } ],
"C_MMCM_CLKOUT0_DIVIDE_F": [ { "value": "20.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT1_DIVIDE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_MMCM_CLKOUT2_DIVIDE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_MMCM_CLKOUT3_DIVIDE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_MMCM_CLKOUT4_DIVIDE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_MMCM_CLKOUT5_DIVIDE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_MMCM_CLKOUT6_DIVIDE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_MMCM_CLKOUT0_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT1_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT2_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT3_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT4_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT5_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT6_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKFBOUT_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT0_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT5_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKOUT6_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_MMCM_CLKFBOUT_USE_FINE_PS": [ { "value": "FALSE", "resolve_type": "generated", "usage": "all" } ],
"C_MMCM_CLKOUT0_USE_FINE_PS": [ { "value": "FALSE", "resolve_type": "generated", "usage": "all" } ],
"C_MMCM_CLKOUT1_USE_FINE_PS": [ { "value": "FALSE", "resolve_type": "generated", "usage": "all" } ],
"C_MMCM_CLKOUT2_USE_FINE_PS": [ { "value": "FALSE", "resolve_type": "generated", "usage": "all" } ],
"C_MMCM_CLKOUT3_USE_FINE_PS": [ { "value": "FALSE", "resolve_type": "generated", "usage": "all" } ],
"C_MMCM_CLKOUT4_USE_FINE_PS": [ { "value": "FALSE", "resolve_type": "generated", "usage": "all" } ],
"C_MMCM_CLKOUT5_USE_FINE_PS": [ { "value": "FALSE", "resolve_type": "generated", "usage": "all" } ],
"C_MMCM_CLKOUT6_USE_FINE_PS": [ { "value": "FALSE", "resolve_type": "generated", "usage": "all" } ],
"C_PLL_NOTES": [ { "value": "No notes", "resolve_type": "generated", "usage": "all" } ],
"C_PLL_BANDWIDTH": [ { "value": "OPTIMIZED", "resolve_type": "generated", "usage": "all" } ],
"C_PLL_CLK_FEEDBACK": [ { "value": "CLKFBOUT", "resolve_type": "generated", "usage": "all" } ],
"C_PLL_CLKFBOUT_MULT": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_PLL_CLKIN_PERIOD": [ { "value": "1.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PLL_COMPENSATION": [ { "value": "SYSTEM_SYNCHRONOUS", "resolve_type": "generated", "usage": "all" } ],
"C_PLL_DIVCLK_DIVIDE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_PLL_REF_JITTER": [ { "value": "0.010", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PLL_CLKOUT0_DIVIDE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_PLL_CLKOUT1_DIVIDE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_PLL_CLKOUT2_DIVIDE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_PLL_CLKOUT3_DIVIDE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_PLL_CLKOUT4_DIVIDE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_PLL_CLKOUT5_DIVIDE": [ { "value": "1", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_PLL_CLKOUT0_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PLL_CLKOUT1_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PLL_CLKOUT2_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PLL_CLKOUT3_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PLL_CLKOUT4_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PLL_CLKOUT5_DUTY_CYCLE": [ { "value": "0.500", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PLL_CLKFBOUT_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PLL_CLKOUT0_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PLL_CLKOUT1_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PLL_CLKOUT2_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PLL_CLKOUT3_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PLL_CLKOUT4_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PLL_CLKOUT5_PHASE": [ { "value": "0.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLOCK_MGR_TYPE": [ { "value": "NA", "resolve_type": "generated", "usage": "all" } ],
"C_OVERRIDE_MMCM": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_OVERRIDE_PLL": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_PRIMARY_PORT": [ { "value": "clk_in1", "resolve_type": "generated", "usage": "all" } ],
"C_SECONDARY_PORT": [ { "value": "clk_in2", "resolve_type": "generated", "usage": "all" } ],
"C_CLK_OUT1_PORT": [ { "value": "clk_out1", "resolve_type": "generated", "usage": "all" } ],
"C_CLK_OUT2_PORT": [ { "value": "clk_out2", "resolve_type": "generated", "usage": "all" } ],
"C_CLK_OUT3_PORT": [ { "value": "clk_out3", "resolve_type": "generated", "usage": "all" } ],
"C_CLK_OUT4_PORT": [ { "value": "clk_out4", "resolve_type": "generated", "usage": "all" } ],
"C_CLK_OUT5_PORT": [ { "value": "clk_out5", "resolve_type": "generated", "usage": "all" } ],
"C_CLK_OUT6_PORT": [ { "value": "clk_out6", "resolve_type": "generated", "usage": "all" } ],
"C_CLK_OUT7_PORT": [ { "value": "clk_out7", "resolve_type": "generated", "usage": "all" } ],
"C_RESET_PORT": [ { "value": "reset", "resolve_type": "generated", "usage": "all" } ],
"C_LOCKED_PORT": [ { "value": "locked", "resolve_type": "generated", "usage": "all" } ],
"C_CLKFB_IN_PORT": [ { "value": "clkfb_in", "resolve_type": "generated", "usage": "all" } ],
"C_CLKFB_IN_P_PORT": [ { "value": "clkfb_in_p", "resolve_type": "generated", "usage": "all" } ],
"C_CLKFB_IN_N_PORT": [ { "value": "clkfb_in_n", "resolve_type": "generated", "usage": "all" } ],
"C_CLKFB_OUT_PORT": [ { "value": "clkfb_out", "resolve_type": "generated", "usage": "all" } ],
"C_CLKFB_OUT_P_PORT": [ { "value": "clkfb_out_p", "resolve_type": "generated", "usage": "all" } ],
"C_CLKFB_OUT_N_PORT": [ { "value": "clkfb_out_n", "resolve_type": "generated", "usage": "all" } ],
"C_POWER_DOWN_PORT": [ { "value": "power_down", "resolve_type": "generated", "usage": "all" } ],
"C_DADDR_PORT": [ { "value": "daddr", "resolve_type": "generated", "usage": "all" } ],
"C_DCLK_PORT": [ { "value": "dclk", "resolve_type": "generated", "usage": "all" } ],
"C_DRDY_PORT": [ { "value": "drdy", "resolve_type": "generated", "usage": "all" } ],
"C_DWE_PORT": [ { "value": "dwe", "resolve_type": "generated", "usage": "all" } ],
"C_DIN_PORT": [ { "value": "din", "resolve_type": "generated", "usage": "all" } ],
"C_DOUT_PORT": [ { "value": "dout", "resolve_type": "generated", "usage": "all" } ],
"C_DEN_PORT": [ { "value": "den", "resolve_type": "generated", "usage": "all" } ],
"C_PSCLK_PORT": [ { "value": "psclk", "resolve_type": "generated", "usage": "all" } ],
"C_PSEN_PORT": [ { "value": "psen", "resolve_type": "generated", "usage": "all" } ],
"C_PSINCDEC_PORT": [ { "value": "psincdec", "resolve_type": "generated", "usage": "all" } ],
"C_PSDONE_PORT": [ { "value": "psdone", "resolve_type": "generated", "usage": "all" } ],
"C_CLK_VALID_PORT": [ { "value": "CLK_VALID", "resolve_type": "generated", "usage": "all" } ],
"C_STATUS_PORT": [ { "value": "STATUS", "resolve_type": "generated", "usage": "all" } ],
"C_CLK_IN_SEL_PORT": [ { "value": "clk_in_sel", "resolve_type": "generated", "usage": "all" } ],
"C_INPUT_CLK_STOPPED_PORT": [ { "value": "input_clk_stopped", "resolve_type": "generated", "usage": "all" } ],
"C_CLKFB_STOPPED_PORT": [ { "value": "clkfb_stopped", "resolve_type": "generated", "usage": "all" } ],
"C_CLKIN1_JITTER_PS": [ { "value": "100.0", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_CLKIN2_JITTER_PS": [ { "value": "166.66", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_PRIMITIVE": [ { "value": "MMCM", "resolve_type": "generated", "usage": "all" } ],
"C_SS_MODE": [ { "value": "CENTER_HIGH", "resolve_type": "generated", "usage": "all" } ],
"C_SS_MOD_PERIOD": [ { "value": "4000", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_SS_MOD_TIME": [ { "value": "0.004", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_HAS_CDDC": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_CDDCDONE_PORT": [ { "value": "cddcdone", "resolve_type": "generated", "usage": "all" } ],
"C_CDDCREQ_PORT": [ { "value": "cddcreq", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUTPHY_MODE": [ { "value": "VCO", "resolve_type": "generated", "usage": "all" } ],
"C_ENABLE_CLKOUTPHY": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_INTERFACE_SELECTION": [ { "value": "0", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_S_AXI_ADDR_WIDTH": [ { "value": "11", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_S_AXI_DATA_WIDTH": [ { "value": "32", "resolve_type": "generated", "format": "long", "usage": "all" } ],
"C_POWER_REG": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT0_1": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT0_2": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT1_1": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT1_2": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT2_1": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT2_2": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT3_1": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT3_2": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT4_1": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT4_2": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT5_1": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT5_2": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT6_1": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT6_2": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKFBOUT_1": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKFBOUT_2": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_DIVCLK": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_LOCK_1": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_LOCK_2": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_LOCK_3": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_FILTER_1": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_FILTER_2": [ { "value": "0000", "resolve_type": "generated", "usage": "all" } ],
"C_DIVIDE1_AUTO": [ { "value": "1", "resolve_type": "generated", "usage": "all" } ],
"C_DIVIDE2_AUTO": [ { "value": "0.05", "resolve_type": "generated", "usage": "all" } ],
"C_DIVIDE3_AUTO": [ { "value": "0.05", "resolve_type": "generated", "usage": "all" } ],
"C_DIVIDE4_AUTO": [ { "value": "0.05", "resolve_type": "generated", "usage": "all" } ],
"C_DIVIDE5_AUTO": [ { "value": "0.05", "resolve_type": "generated", "usage": "all" } ],
"C_DIVIDE6_AUTO": [ { "value": "0.05", "resolve_type": "generated", "usage": "all" } ],
"C_DIVIDE7_AUTO": [ { "value": "0.05", "resolve_type": "generated", "usage": "all" } ],
"C_PLLBUFGCEDIV": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_MMCMBUFGCEDIV": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_PLLBUFGCEDIV1": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_PLLBUFGCEDIV2": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_PLLBUFGCEDIV3": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_PLLBUFGCEDIV4": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_MMCMBUFGCEDIV1": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_MMCMBUFGCEDIV2": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_MMCMBUFGCEDIV3": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_MMCMBUFGCEDIV4": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_MMCMBUFGCEDIV5": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_MMCMBUFGCEDIV6": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_MMCMBUFGCEDIV7": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT1_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT2_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT3_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT4_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT5_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT6_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT7_MATCHED_ROUTING": [ { "value": "false", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT0_ACTUAL_FREQ": [ { "value": "50.00000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT1_ACTUAL_FREQ": [ { "value": "100.000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT2_ACTUAL_FREQ": [ { "value": "100.000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT3_ACTUAL_FREQ": [ { "value": "100.000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT4_ACTUAL_FREQ": [ { "value": "100.000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT5_ACTUAL_FREQ": [ { "value": "100.000", "resolve_type": "generated", "usage": "all" } ],
"C_CLKOUT6_ACTUAL_FREQ": [ { "value": "100.000", "resolve_type": "generated", "usage": "all" } ],
"C_M_MAX": [ { "value": "64.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_M_MIN": [ { "value": "2.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_D_MAX": [ { "value": "80.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_D_MIN": [ { "value": "1.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_O_MAX": [ { "value": "128.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_O_MIN": [ { "value": "1.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_VCO_MIN": [ { "value": "600.000", "resolve_type": "generated", "format": "float", "usage": "all" } ],
"C_VCO_MAX": [ { "value": "1200.000", "resolve_type": "generated", "format": "float", "usage": "all" } ]
},
"project_parameters": {
"ARCHITECTURE": [ { "value": "artix7" } ],
"BASE_BOARD_PART": [ { "value": "" } ],
"BOARD_CONNECTIONS": [ { "value": "" } ],
"DEVICE": [ { "value": "xc7a100t" } ],
"PACKAGE": [ { "value": "csg324" } ],
"PREFHDL": [ { "value": "VERILOG" } ],
"SILICON_REVISION": [ { "value": "" } ],
"SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ],
"SPEEDGRADE": [ { "value": "-1" } ],
"STATIC_POWER": [ { "value": "" } ],
"TEMPERATURE_GRADE": [ { "value": "" } ],
"USE_RDI_CUSTOMIZATION": [ { "value": "TRUE" } ],
"USE_RDI_GENERATION": [ { "value": "TRUE" } ]
},
"runtime_parameters": {
"IPCONTEXT": [ { "value": "IP_Flow" } ],
"IPREVISION": [ { "value": "11" } ],
"MANAGED": [ { "value": "TRUE" } ],
"OUTPUTDIR": [ { "value": "../../../../cpu_rv32i.gen/sources_1/ip/pll" } ],
"SELECTEDSIMMODEL": [ { "value": "" } ],
"SHAREDDIR": [ { "value": "." } ],
"SWVERSION": [ { "value": "2022.2" } ],
"SYNTHESISFLOW": [ { "value": "OUT_OF_CONTEXT" } ]
}
},
"boundary": {
"ports": {
"clk_in1": [ { "direction": "in" } ],
"clk_out1": [ { "direction": "out" } ]
},
"interfaces": {
"clock_CLK_IN1": {
"vlnv": "xilinx.com:signal:clock:1.0",
"abstraction_type": "xilinx.com:signal:clock_rtl:1.0",
"mode": "slave",
"parameters": {
"FREQ_HZ": [ { "value": "100000000", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"FREQ_TOLERANCE_HZ": [ { "value": "0", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"ASSOCIATED_BUSIF": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"ASSOCIATED_PORT": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"ASSOCIATED_RESET": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ],
"BOARD.ASSOCIATED_PARAM": [ { "value": "CLK_IN1_BOARD_INTERFACE", "usage": "all", "is_static_object": false } ]
},
"port_maps": {
"CLK_IN1": [ { "physical_name": "clk_in1" } ]
}
},
"clock_CLK_OUT1": {
"vlnv": "xilinx.com:signal:clock:1.0",
"abstraction_type": "xilinx.com:signal:clock_rtl:1.0",
"mode": "master",
"parameters": {
"FREQ_HZ": [ { "value": "100000000", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"FREQ_TOLERANCE_HZ": [ { "value": "0", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
"PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
"CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"ASSOCIATED_BUSIF": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"ASSOCIATED_PORT": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"ASSOCIATED_RESET": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
"INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
},
"port_maps": {
"CLK_OUT1": [ { "physical_name": "clk_out1" } ]
}
}
}
}
}
}

106
cpu_rv32i.srcs/sources_1/new/alu.v Normal file
View File

@@ -0,0 +1,106 @@
`timescale 1ns / 1ps
module alu(
input [10:0] alu_op ,
input [31:0] alu_src1 ,
input [31:0] alu_src2 ,
output [31:0] alu_result,
output Carry ,
output Sign ,
output Overflow ,
output Zero
);
wire op_lui;
wire op_add;
wire op_sub;
wire op_or;
wire op_slt;
wire op_sltu;
wire op_xor;
wire op_and;
wire op_sll;
wire op_srl;
wire op_sra;
assign op_lui = alu_op[ 0];
assign op_add = alu_op[ 1];
assign op_sub = alu_op[ 2];
assign op_slt = alu_op[ 3];
assign op_sltu = alu_op[ 4];
assign op_xor = alu_op[ 5];
assign op_or = alu_op[ 6];
assign op_and = alu_op[ 7];
assign op_sll = alu_op[ 8];
assign op_srl = alu_op[ 9];
assign op_sra = alu_op[10];
wire [31:0] lui_result;
wire [31:0] add_sub_result;
wire [31:0] slt_result;
wire [31:0] sltu_result;
wire [31:0] xor_result;
wire [31:0] or_result;
wire [31:0] and_result;
wire [31:0] sll_result;
wire [31:0] sr64_result;
wire [31:0] sr_result;
// 32-bit adder
wire [31:0] adder_a;
wire [31:0] adder_b;
wire adder_cin;
wire [31:0] adder_result;
wire adder_cout;
assign adder_a = alu_src1;
assign adder_b = (op_sub | op_slt | op_sltu) ? ~alu_src2 : alu_src2;
assign adder_cin = (op_sub | op_slt | op_sltu) ? 1'b1 : 1'b0;
assign {adder_cout, adder_result} = adder_a + adder_b + adder_cin;
// ADD, SUB result
assign add_sub_result = adder_result;
// SLT result
assign slt_result[31:1] = 31'b0;
assign slt_result[0] = (alu_src1[31] & ~alu_src2[31])
| ((alu_src1[31] ~^ alu_src2[31]) & adder_result[31]);
// SLTU result
assign sltu_result[31:1] = 31'b0;
assign sltu_result[0] = ~adder_cout;
// bitwise operation
assign or_result = alu_src1 | alu_src2;
assign and_result = alu_src1 & alu_src2;
assign xor_result = alu_src1 ^ alu_src2;
assign lui_result = alu_src2;
// SLL result
assign sll_result = alu_src1 << alu_src2[4:0];
// SRL, SRA result
assign sr64_result = {{32{op_sra & alu_src1[31]}}, alu_src1[31:0]} >> alu_src2[4:0];
assign sr_result = sr64_result[31:0];
// final result mux
assign alu_result = ({32{op_add|op_sub}} & add_sub_result)
| ({32{op_slt }} & slt_result)
| ({32{op_sltu }} & sltu_result)
| ({32{op_or }} & or_result)
| ({32{op_xor }} & xor_result)
| ({32{op_and }} & and_result)
| ({32{op_lui }} & lui_result)
| ({32{op_sll }} & sll_result)
| ({32{op_srl|op_sra}} & sr_result);
assign Carry = op_sub ^ adder_cout;
assign Sign = alu_result[31];
assign Overflow = (op_add|op_sub) ? ( adder_a[31] & adder_b[31] & adder_cout)
| (~adder_a[31] & ~adder_b[31] & ~adder_cout)
: 1'b0;
assign Zero = (alu_result == 32'b0);
endmodule

22
cpu_rv32i.srcs/sources_1/new/cpu.h Normal file
View File

@@ -0,0 +1,22 @@
`ifndef CPU_H
`define CPU_H
`define BR_BUS_WD 33
`define DS_TO_FW_BUS_WD 10
`define ES_TO_FW_BUS_WD 12
`define MS_TO_FW_BUS_WD 6
`define FW_TO_ES_BUS_WD 5
`define MS_TO_ES_BUS_WD 32
`define WS_TO_ES_BUS_WD 32
`define DS_TO_LU_BUS_WD 10
`define ES_TO_LU_BUS_WD 10
`define LU_TO_DS_BUS_WD 1
`define FS_TO_DS_BUS_WD 64
`define DS_TO_ES_BUS_WD 178
`define ES_TO_MS_BUS_WD 120
`define MS_TO_WS_BUS_WD 103
`define WS_TO_RF_BUS_WD 38
`endif

227
cpu_rv32i.srcs/sources_1/new/cpu_top.v Normal file
View File

@@ -0,0 +1,227 @@
`timescale 1ns / 1ps
`include "cpu.h"
module cpu_top(
input clk,
input resetn,
// inst ram interface
output instr_ram_en,
output [ 3:0] instr_ram_wen,
output [31:0] instr_ram_addr,
output [31:0] instr_ram_wdata,
input [31:0] instr_ram_rdata,
// data ram interface
output data_ram_en,
output [ 3:0] data_ram_wen,
output [31:0] data_ram_addr,
output [31:0] data_ram_wdata,
input [31:0] data_ram_rdata,
// trace debug interface
output [31:0] debug_wb_pc,
output [ 3:0] debug_wb_rf_wen,
output [ 4:0] debug_wb_rf_wnum,
output [31:0] debug_wb_rf_wdata,
input [ 4:0] rf_raddr,
output [31:0] rf_rdata
);
reg reset;
always @(posedge clk) reset <= ~resetn;
wire ds_allowin;
wire es_allowin;
wire ms_allowin;
wire ws_allowin;
wire fs_to_ds_valid;
wire ds_to_es_valid;
wire es_to_ms_valid;
wire ms_to_ws_valid;
wire [`FS_TO_DS_BUS_WD -1:0] fs_to_ds_bus;
wire [`DS_TO_ES_BUS_WD -1:0] ds_to_es_bus;
wire [`ES_TO_MS_BUS_WD -1:0] es_to_ms_bus;
wire [`MS_TO_WS_BUS_WD -1:0] ms_to_ws_bus;
wire [`WS_TO_RF_BUS_WD -1:0] ws_to_rf_bus;
wire [`BR_BUS_WD -1:0] br_bus;
wire [`DS_TO_FW_BUS_WD -1:0] ds_to_fw_bus;
wire [`ES_TO_FW_BUS_WD -1:0] es_to_fw_bus;
wire [`MS_TO_FW_BUS_WD -1:0] ms_to_fw_bus;
wire [`FW_TO_ES_BUS_WD -1:0] fw_to_es_bus;
wire [`MS_TO_ES_BUS_WD -1:0] ms_to_es_bus;
wire [`WS_TO_ES_BUS_WD -1:0] ws_to_es_bus;
wire [`DS_TO_LU_BUS_WD -1:0] ds_to_lu_bus;
wire [`ES_TO_LU_BUS_WD -1:0] es_to_lu_bus;
wire lu_stall;
wire dh_flush;
wire dh_stall;
wire fs_stall;
wire fs_flush;
wire ds_flush;
wire es_flush;
wire ms_flush;
wire ws_flush;
// IF stage
if_stage if_stage(
.clk (clk ),
.reset (reset ),
.fs_flush (fs_flush ),
.fs_stall (fs_stall ),
//allowin
.ds_allowin (ds_allowin ),
//brbus
.br_bus (br_bus ),
//outputs
.fs_to_ds_valid (fs_to_ds_valid ),
.fs_to_ds_bus (fs_to_ds_bus ),
// inst ram interface
.instr_ram_en (instr_ram_en ),
.instr_ram_wen (instr_ram_wen ),
.instr_ram_addr (instr_ram_addr ),
.instr_ram_wdata(instr_ram_wdata),
.instr_ram_rdata(instr_ram_rdata)
);
// ID stage
id_stage id_stage(
.clk (clk ),
.reset (reset ),
.ds_flush (ds_flush ),
.stall (lu_stall ),
//allowin
.es_allowin (es_allowin ),
.ds_allowin (ds_allowin ),
//from fs
.fs_to_ds_valid (fs_to_ds_valid ),
.fs_to_ds_bus (fs_to_ds_bus ),
//to es
.ds_to_es_valid (ds_to_es_valid ),
.ds_to_es_bus (ds_to_es_bus ),
//to fw
.ds_to_fw_bus (ds_to_fw_bus ),
//to lu
.ds_to_lu_bus (ds_to_lu_bus ),
//to rf: for write back
.ws_to_rf_bus (ws_to_rf_bus ),
//to pipctr
.dh_flush (dh_flush ),
.dh_stall (dh_stall ),
.rf_raddr (rf_raddr ),
.rf_rdata (rf_rdata )
);
// EXE stage
exe_stage exe_stage(
.clk (clk ),
.reset (reset ),
.es_flush (es_flush ),
//allowin
.ms_allowin (ms_allowin ),
.es_allowin (es_allowin ),
//from ds
.ds_to_es_valid (ds_to_es_valid ),
.ds_to_es_bus (ds_to_es_bus ),
//from ms
.ms_to_es_bus (ms_to_es_bus ),
//from ws
.ws_to_es_bus (ws_to_es_bus ),
//from fw
.fw_to_es_bus (fw_to_es_bus ),
//to lu
.es_to_lu_bus (es_to_lu_bus ),
//to fw
.es_to_fw_bus (es_to_fw_bus ),
//to ms
.es_to_ms_valid (es_to_ms_valid ),
.es_to_ms_bus (es_to_ms_bus ),
// data ram interface
.data_ram_en (data_ram_en ),
.data_ram_wen (data_ram_wen ),
.data_ram_addr (data_ram_addr ),
.data_ram_wdata (data_ram_wdata )
);
// MEM stage
mem_stage mem_stage(
.clk (clk ),
.reset (reset ),
.ms_flush (ms_flush ),
//allowin
.ws_allowin (ws_allowin ),
.ms_allowin (ms_allowin ),
//from es
.es_to_ms_valid (es_to_ms_valid ),
.es_to_ms_bus (es_to_ms_bus ),
//to fs
.br_bus (br_bus ),
//to es: for forward
.ms_to_es_bus (ms_to_es_bus ),
//to fw
.ms_to_fw_bus (ms_to_fw_bus ),
//to ws
.ms_to_ws_valid (ms_to_ws_valid ),
.ms_to_ws_bus (ms_to_ws_bus ),
//from data-ram
.data_ram_rdata (data_ram_rdata)
);
// WB stage
wb_stage wb_stage(
.clk (clk ),
.reset (reset ),
.ws_flush (ws_flush ),
//allowin
.ws_allowin (ws_allowin ),
//from ms
.ms_to_ws_valid (ms_to_ws_valid ),
.ms_to_ws_bus (ms_to_ws_bus ),
//to rf: for write back
.ws_to_rf_bus (ws_to_rf_bus ),
//to es: for forward
.ws_to_es_bus (ws_to_es_bus ),
//trace debug interface
.debug_wb_pc (debug_wb_pc ),
.debug_wb_rf_wen (debug_wb_rf_wen ),
.debug_wb_rf_wnum (debug_wb_rf_wnum ),
.debug_wb_rf_wdata(debug_wb_rf_wdata)
);
// Forward
forward u_forward(
.clk (clk ),
.ds_to_fw_bus (ds_to_fw_bus),
.es_to_fw_bus (es_to_fw_bus),
.ms_to_fw_bus (ms_to_fw_bus),
.fw_to_es_bus (fw_to_es_bus)
);
// Load Use
loaduse u_loaduse(
.clk (clk ),
.reset (reset ),
.ds_to_lu_bus (ds_to_lu_bus),
.es_to_lu_bus (es_to_lu_bus),
.ds_stall (lu_stall ),
.es_flush (lu_flush )
);
piplinectr u_piplinectr(
.clk (clk ),
.reset (reset ),
.lu_flush (lu_flush),
.dh_flush (dh_flush),
.dh_stall (dh_stall),
.fs_stall (fs_stall),
.fs_flush (fs_flush),
.ds_flush (ds_flush),
.es_flush (es_flush),
.ms_flush (ms_flush),
.ws_flush (ws_flush)
);
endmodule

153
cpu_rv32i.srcs/sources_1/new/ctrsignal.v Normal file
View File

@@ -0,0 +1,153 @@
`timescale 1ns / 1ps
module ctrsignal(
input [ 6:0] OP,
input [ 2:0] func3,
input [ 6:0] func7,
output [ 4:0] ExtOp,
output [ 1:0] ALUAsrc,
output [ 2:0] ALUBsrc,
output [10:0] ALUctr,
output RegWr,
output MemtoReg,
output MemWr,
output [ 5:0] Branch,
output [ 1:0] Jump,
output [ 2:0] Store,
output [ 4:0] Load,
output shamt
);
wire u_type;
wire j_type;
wire s_type;
wire i_type;
wire b_type;
wire r_type;
wire instr_lui ;
wire instr_auipc;
wire instr_jal ;
wire instr_jalr ;
wire instr_beq ;
wire instr_bne ;
wire instr_blt ;
wire instr_bge ;
wire instr_bltu ;
wire instr_bgeu ;
wire instr_lb ;
wire instr_lh ;
wire instr_lw ;
wire instr_lbu ;
wire instr_lhu ;
wire instr_sb ;
wire instr_sh ;
wire instr_sw ;
wire instr_addi ;
wire instr_slti ;
wire instr_sltiu;
wire instr_xori ;
wire instr_ori ;
wire instr_andi ;
wire instr_slli ;
wire instr_srli ;
wire instr_srai ;
wire instr_add ;
wire instr_sub ;
wire instr_sll ;
wire instr_slt ;
wire instr_sltu ;
wire instr_xor ;
wire instr_srl ;
wire instr_sra ;
wire instr_or ;
wire instr_and ;
assign u_type = (OP == 7'b0110111) || (OP == 7'b0010111);
assign j_type = (OP == 7'b1101111);
assign s_type = (OP == 7'b0100011);
assign i_type = (OP == 7'b1100111) || (OP == 7'b0000011) ||(OP == 7'b0010011);
assign b_type = (OP == 7'b1100011);
assign r_type = (OP == 7'b0110011);
assign instr_lui = (OP == 7'b0110111) ;
assign instr_auipc = (OP == 7'b0010111) ;
assign instr_jal = (OP == 7'b1101111) ;
assign instr_jalr = (OP == 7'b1100111) ;
assign instr_beq = b_type & (func3 == 3'b000) ;
assign instr_bne = b_type & (func3 == 3'b001) ;
assign instr_blt = b_type & (func3 == 3'b100) ;
assign instr_bge = b_type & (func3 == 3'b101) ;
assign instr_bltu = b_type & (func3 == 3'b110) ;
assign instr_bgeu = b_type & (func3 == 3'b111) ;
assign instr_lb = (OP == 7'b0000011) & (func3 == 3'b000) ;
assign instr_lh = (OP == 7'b0000011) & (func3 == 3'b001) ;
assign instr_lw = (OP == 7'b0000011) & (func3 == 3'b010) ;
assign instr_lbu = (OP == 7'b0000011) & (func3 == 3'b100) ;
assign instr_lhu = (OP == 7'b0000011) & (func3 == 3'b101) ;
assign instr_sb = s_type & (func3 == 3'b000) ;
assign instr_sh = s_type & (func3 == 3'b001) ;
assign instr_sw = s_type & (func3 == 3'b010) ;
assign instr_addi = (OP == 7'b0010011) & (func3 == 3'b000) ;
assign instr_slti = (OP == 7'b0010011) & (func3 == 3'b010) ;
assign instr_sltiu = (OP == 7'b0010011) & (func3 == 3'b011) ;
assign instr_xori = (OP == 7'b0010011) & (func3 == 3'b100) ;
assign instr_ori = (OP == 7'b0010011) & (func3 == 3'b110) ;
assign instr_andi = (OP == 7'b0010011) & (func3 == 3'b111) ;
assign instr_slli = (OP == 7'b0010011) & (func3 == 3'b001) & (func7 == 7'b0000000);
assign instr_srli = (OP == 7'b0010011) & (func3 == 3'b101) & (func7 == 7'b0000000);
assign instr_srai = (OP == 7'b0010011) & (func3 == 3'b101) & (func7 == 7'b0100000);
assign instr_add = r_type & (func3 == 3'b000) & (func7 == 7'b0000000);
assign instr_sub = r_type & (func3 == 3'b000) & (func7 == 7'b0100000);
assign instr_sll = r_type & (func3 == 3'b001) & (func7 == 7'b0000000);
assign instr_slt = r_type & (func3 == 3'b010) & (func7 == 7'b0000000);
assign instr_sltu = r_type & (func3 == 3'b011) & (func7 == 7'b0000000);
assign instr_xor = r_type & (func3 == 3'b100) & (func7 == 7'b0000000);
assign instr_srl = r_type & (func3 == 3'b101) & (func7 == 7'b0000000);
assign instr_sra = r_type & (func3 == 3'b101) & (func7 == 7'b0100000);
assign instr_or = r_type & (func3 == 3'b110) & (func7 == 7'b0000000);
assign instr_and = r_type & (func3 == 3'b111) & (func7 == 7'b0000000);
assign ExtOp = {u_type,
j_type,
s_type,
i_type,
b_type
};
assign ALUAsrc = { j_type | instr_auipc, // pc
~j_type & ~instr_auipc // rs1_value
};
assign ALUBsrc = { u_type | s_type | i_type, // imm
j_type, // 4
b_type | r_type // rs2_value
};
assign ALUctr[ 0] = instr_lui ;
assign ALUctr[ 1] = instr_lb | instr_lh | instr_lw | instr_lbu
| instr_lhu | instr_sb | instr_sh | instr_sw
| instr_addi | instr_add | instr_auipc | j_type ;
assign ALUctr[ 2] = instr_sub | b_type ;
assign ALUctr[ 3] = instr_slt | instr_slti ;
assign ALUctr[ 4] = instr_sltu | instr_sltiu ;
assign ALUctr[ 5] = instr_xori | instr_xor ;
assign ALUctr[ 6] = instr_ori | instr_or ;
assign ALUctr[ 7] = instr_and | instr_andi ;
assign ALUctr[ 8] = instr_slli | instr_sll ;
assign ALUctr[ 9] = instr_srli | instr_srl ;
assign ALUctr[10] = instr_srai | instr_sra ;
assign RegWr = ~(instr_sw | instr_sh | instr_sb) & ~b_type;
assign MemtoReg = instr_lb | instr_lh | instr_lw | instr_lbu | instr_lhu;
assign MemWr = s_type;
assign Branch = { instr_bgeu, instr_bltu , instr_bge, instr_blt , instr_bne, instr_beq};
assign Jump = { instr_jalr, instr_jal};
assign Load = { instr_lhu , instr_lbu , instr_lw , instr_lh , instr_lb};
assign Store = { instr_sw , instr_sh , instr_sb};
assign shamt = instr_slli | instr_srli | instr_srai;
endmodule

192
cpu_rv32i.srcs/sources_1/new/exe_stage.v Normal file
View File

@@ -0,0 +1,192 @@
`timescale 1ns / 1ps
`include "cpu.h"
module exe_stage(
input clk ,
input reset ,
input es_flush,
input ms_allowin ,
output es_allowin ,
input ds_to_es_valid,
input [`DS_TO_ES_BUS_WD -1:0] ds_to_es_bus ,
input [`MS_TO_ES_BUS_WD -1:0] ms_to_es_bus ,
input [`WS_TO_ES_BUS_WD -1:0] ws_to_es_bus ,
input [`FW_TO_ES_BUS_WD -1:0] fw_to_es_bus ,
output [`ES_TO_FW_BUS_WD -1:0] es_to_fw_bus ,
output [`ES_TO_LU_BUS_WD -1:0] es_to_lu_bus ,
output es_to_ms_valid,
output [`ES_TO_MS_BUS_WD -1:0] es_to_ms_bus ,
output data_ram_en ,
output [ 3:0] data_ram_wen ,
output [31:0] data_ram_addr ,
output [31:0] data_ram_wdata
);
reg es_valid ;
wire es_ready_go ;
reg [`DS_TO_ES_BUS_WD -1:0] ds_to_es_bus_r;
wire [ 1:0] es_ALUAsrc ;
wire [ 2:0] es_ALUBsrc ;
wire [10:0] es_ALUctr ;
wire [ 5:0] es_Branch ;
wire [ 1:0] es_Jump ;
wire es_MemtoReg ;
wire es_MemWr ;
wire es_RegWr ;
wire [ 4:0] es_Load ;
wire [ 2:0] es_Store ;
wire es_shamt ;
wire [31:0] es_imm ;
wire [31:0] es_rs1_value;
wire [31:0] es_rs2_value;
wire [ 4:0] es_rd ;
wire [ 4:0] es_rs1 ;
wire [ 4:0] es_rs2 ;
wire [31:0] es_pc ;
assign { es_ALUctr , //177:167
es_shamt , //166:166
es_Load , //166:162
es_Store , //161:159
es_MemWr , //158:158
es_Branch , //157:152
es_Jump , //151:150
es_MemtoReg , //149:149
es_RegWr , //148:148
es_ALUAsrc , //147:146
es_ALUBsrc , //145:143
es_rd , //142:138
es_rs1 , //137:133
es_rs2 , //132:128
es_imm , //127:96
es_rs1_value , //95 :64
es_rs2_value , //63 :32
es_pc //31 :0
} = ds_to_es_bus_r;
wire [ 31:0] br_target ;
wire [31:0] es_alu_src1 ;
wire [31:0] es_alu_src2 ;
wire [31:0] es_alu_result;
wire es_Carry ;
wire es_Sign ;
wire es_Overflow ;
wire es_Zero ;
assign es_to_ms_bus = { es_Carry , //119:119
es_Sign , //118:118
es_Overflow , //117:117
es_Zero , //116:116
br_target , //115:84
es_Load , //83 :79
es_Branch , //78 :73
es_Jump , //72 :71
es_MemtoReg , //70 :70
es_RegWr , //69 :69
es_rd , //68 :64
es_alu_result , //63 :32
es_pc //31 :0
};
wire [ 1:0] BusAFw;
wire [ 1:0] BusBFw;
wire DiSrc;
assign {BusAFw,
BusBFw,
DiSrc } = fw_to_es_bus;
wire [31:0] rf_wdata;
wire [31:0] ms_alu_result;
assign rf_wdata = ws_to_es_bus[31:0];
assign ms_alu_result = ms_to_es_bus[31:0];
assign es_to_fw_bus = {es_rs2, es_rd, es_RegWr, es_MemWr};
assign es_to_lu_bus = {es_rd, es_Load};
wire [31:0] es_rs1_forward;
wire [31:0] es_rs2_forward;
assign es_ready_go = 1'b1;
assign es_allowin = !es_valid || es_ready_go && ms_allowin;
assign es_to_ms_valid = es_valid && es_ready_go;
always @(posedge clk) begin
if (reset) begin
es_valid <= 1'b0;
end
else if (es_allowin) begin
es_valid <= ds_to_es_valid;
end
if (reset || es_flush) begin
ds_to_es_bus_r <= 0;
end
else if (ds_to_es_valid && es_allowin) begin
ds_to_es_bus_r <= ds_to_es_bus;
end
// else begin
// ds_to_es_bus_r <= 0;
// end
end
assign es_rs1_forward = (BusAFw == 2'b00) ? es_rs1_value :
(BusAFw == 2'b01) ? rf_wdata :
(BusAFw == 2'b10) ? ms_alu_result :
32'b0;
assign es_rs2_forward = (BusBFw == 2'b00) ? es_rs2_value :
(BusBFw == 2'b01) ? rf_wdata :
(BusBFw == 2'b10) ? ms_alu_result :
32'b0;
assign es_alu_src1 = ({32{es_ALUAsrc[1]}} & es_pc)
| ({32{es_ALUAsrc[0]}} & es_rs1_forward);
assign es_alu_src2 = ({32{es_ALUBsrc[2]}} & (es_shamt ? {27'b0, es_imm[4:0]} : es_imm))
| ({32{es_ALUBsrc[1]}} & 32'd4)
| ({32{es_ALUBsrc[0]}} & es_rs2_forward);
alu u_alu(
.alu_op (es_ALUctr ),
.alu_src1 (es_alu_src1 ),
.alu_src2 (es_alu_src2 ),
.alu_result (es_alu_result),
.Carry (es_Carry ),
.Sign (es_Sign ),
.Overflow (es_Overflow ),
.Zero (es_Zero )
);
assign data_ram_en = 1'b1;
assign data_ram_wen = (es_MemWr && es_valid) ?
(({4{es_Store[0]}} &
({4{es_alu_result[1:0] == 2'b00}} & 4'b0001)
| ({4{es_alu_result[1:0] == 2'b01}} & 4'b0010)
| ({4{es_alu_result[1:0] == 2'b10}} & 4'b0100)
| ({4{es_alu_result[1:0] == 2'b11}} & 4'b1000))
| ({4{es_Store[1]}} &
({4{es_alu_result[1:0] == 2'b01}} & 4'b0011 )
| ({4{es_alu_result[1:0] == 2'b10}} & 4'b1100 ))
| ({4{es_Store[2]}} & 4'b1111 ))
: 4'b0000 ;
assign data_ram_addr = es_alu_result;
assign data_ram_wdata = DiSrc ? rf_wdata :
(es_Store[0] ? {4{es_rs2_value[ 7:0]}} :
es_Store[1] ? {2{es_rs2_value[15:0]}} :
es_Store[2] ? es_rs2_value :
32'b0 );
assign br_target = ({{31{es_Jump[1] }}, 1'b0} & (es_alu_src1 + es_imm))
| ( {32{es_Jump[0] | (^es_Branch)}} & (es_pc + es_imm));
endmodule

136
cpu_rv32i.srcs/sources_1/new/hazards.v Normal file
View File

@@ -0,0 +1,136 @@
`timescale 1ns / 1ps
`include "cpu.h"
module forward(
input clk,
input [`DS_TO_FW_BUS_WD - 1:0] ds_to_fw_bus,
input [`ES_TO_FW_BUS_WD - 1:0] es_to_fw_bus,
input [`MS_TO_FW_BUS_WD - 1:0] ms_to_fw_bus,
output [`FW_TO_ES_BUS_WD - 1:0] fw_to_es_bus
);
wire [4:0] ds_rs1;
wire [4:0] ds_rs2;
wire [4:0] es_rs2;
wire [4:0] es_rd ;
wire es_MemWr;
wire es_RegWr;
wire [4:0] ms_rd ;
wire ms_RegWr;
wire [1:0] BusAFw;
wire [1:0] BusBFw;
wire DiSrc;
reg [`FW_TO_ES_BUS_WD - 1:0] fw_to_es_bus_r;
assign {ds_rs1, ds_rs2} = ds_to_fw_bus;
assign {es_rs2, es_rd , es_RegWr, es_MemWr} = es_to_fw_bus;
assign {ms_rd , ms_RegWr } = ms_to_fw_bus;
assign BusAFw[0] = ms_RegWr && (ms_rd != 5'b0) && (es_rd != ds_rs1) && (ms_rd == ds_rs1);
assign BusAFw[1] = es_RegWr && (es_rd != 5'b0) && (es_rd == ds_rs1) ;
assign BusBFw[0] = ms_RegWr && (ms_rd != 5'b0) && (es_rd != ds_rs2) && (ms_rd == ds_rs2);
assign BusBFw[1] = es_RegWr && (es_rd != 5'b0) && (es_rd == ds_rs2) ;
assign DiSrc = ms_RegWr && (ms_rd != 5'b0) && (ms_rd == es_rs2) && es_MemWr ;
always @(posedge clk) begin
fw_to_es_bus_r <= {BusAFw, BusBFw, DiSrc};
end
assign fw_to_es_bus = fw_to_es_bus_r;
endmodule
module loaduse(
input clk,
input reset,
input [`DS_TO_LU_BUS_WD -1:0] ds_to_lu_bus,
input [`ES_TO_LU_BUS_WD -1:0] es_to_lu_bus,
output ds_stall,
output es_flush
);
wire [4:0] ds_sr1;
wire [4:0] ds_sr2;
wire [4:0] es_Load;
wire [4:0] es_rd;
wire stall;
assign {ds_sr1, ds_sr2 } = ds_to_lu_bus;
assign {es_rd , es_Load} = es_to_lu_bus;
assign stall = ^es_Load &&
(((ds_sr1 == es_rd) && (ds_sr1 != 5'b0)) || ((ds_sr2 == es_rd) && (ds_sr2 != 5'b0)));
assign ds_stall = stall;
assign es_flush = stall;
endmodule
module piplinectr(
input clk,
input reset,
input lu_flush,
input dh_flush,
input dh_stall,
output fs_stall,
output fs_flush,
output ds_flush,
output es_flush,
output ms_flush,
output ws_flush
);
reg [7:0] flush;
reg [1:0] stall;
always @(posedge clk) begin
if(reset) begin
flush <= 5'b0;
end
else if(lu_flush) begin
flush <= {flush[6] , lu_flush , flush[4:0], 1'b0};
end
else if(dh_flush) begin
flush <= {flush[6:5], {3{dh_flush}}, flush[1:0], 1'b0};
end
else begin
flush <= {flush[6:0] , 1'b0};
end
if(reset) begin
stall <= 2'b0;
end
else if(dh_stall) begin
stall <= {stall[0], dh_stall};
end
else begin
stall <= {stall[0], 1'b0};
end
end
assign {ws_flush,
ms_flush,
es_flush,
ds_flush,
fs_flush} = flush[7:3] | {2'b0, lu_flush, 2'b0} | {3'b0, dh_flush, dh_flush};
assign fs_stall = ^stall | dh_stall;
endmodule

185
cpu_rv32i.srcs/sources_1/new/id_stage.v Normal file
View File

@@ -0,0 +1,185 @@
`timescale 1ns / 1ps
`include "cpu.h"
module id_stage(
input clk,
input reset,
input ds_flush,
input es_allowin,
output ds_allowin,
input fs_to_ds_valid,
input [`FS_TO_DS_BUS_WD -1:0] fs_to_ds_bus,
output ds_to_es_valid,
output [`DS_TO_ES_BUS_WD -1:0] ds_to_es_bus,
output [`DS_TO_FW_BUS_WD -1:0] ds_to_fw_bus,
input stall,
output [`DS_TO_LU_BUS_WD -1:0] ds_to_lu_bus,
input [`WS_TO_RF_BUS_WD -1:0] ws_to_rf_bus,
output dh_flush,
output dh_stall,
input [ 4 :0] rf_raddr,
output [31 :0] rf_rdata
);
reg ds_valid;
wire ds_ready_go;
wire [31 :0] fs_pc;
reg [`FS_TO_DS_BUS_WD -1:0] fs_to_ds_bus_r;
assign fs_pc = fs_to_ds_bus[31:0];
wire [31:0] ds_instr;
wire [31:0] ds_pc;
assign {ds_instr,
ds_pc } = fs_to_ds_bus_r;
wire rf_we;
wire [ 4:0] rf_waddr;
wire [31:0] rf_wdata;
assign {rf_we , //37:37
rf_waddr, //36:32
rf_wdata //31:0
} = ws_to_rf_bus;
wire [ 4:0] ExtOp;
wire [ 1:0] ALUAsrc;
wire [ 2:0] ALUBsrc;
wire [10:0] ALUctr;
wire [ 5:0] Branch;
wire [ 1:0] Jump;
wire MemtoReg;
wire MemWr;
wire RegWr;
wire [ 4:0] Load;
wire [ 2:0] Store;
wire shamt;
wire [31:0] imm;
wire [31:0] rs1_value;
wire [31:0] rs2_value;
wire [ 6:0] op;
wire [ 6:0] func7;
wire [ 2:0] func3;
wire [ 4:0] rs2;
wire [ 4:0] rs1;
wire [ 4:0] rd;
wire [31:0] immI;
wire [31:0] immS;
wire [31:0] immB;
wire [31:0] immU;
wire [31:0] immJ;
wire [ 4:0] rf_raddr1;
wire [ 31:0] rf_rdata1;
wire [ 4:0] rf_raddr2;
wire [ 31:0] rf_rdata2;
assign ds_to_es_bus= { ALUctr , //177:167
shamt , //166:166
Load , //166:162
Store , //161:159
MemWr , //158:158
Branch , //157:152
Jump , //151:150
MemtoReg , //149:149
RegWr , //148:148
ALUAsrc , //147:146
ALUBsrc , //145:143
rd , //142:138
rs1 , //137:133
rs2 , //132:128
imm , //127:96
rs1_value , //95 :64
rs2_value , //63 :32
ds_pc //31 :0
};
assign ds_to_fw_bus = {rs1, rs2};
assign ds_to_lu_bus = {rs1, rs2};
assign ds_ready_go = !stall;
assign ds_allowin = !ds_valid || ds_ready_go && es_allowin;
assign ds_to_es_valid = ds_valid && ds_ready_go;
always @(posedge clk) begin
if (reset) begin
ds_valid <= 1'b0;
end
else if (ds_allowin) begin
ds_valid <= fs_to_ds_valid;
end
if (reset || ds_flush) begin
fs_to_ds_bus_r <= 0;
end
else if (fs_to_ds_valid && ds_allowin) begin
fs_to_ds_bus_r <= fs_to_ds_bus;
end
end
assign op = ds_instr[ 6: 0];
assign func7 = ds_instr[31:25];
assign func3 = ds_instr[14:12];
assign rs2 = ds_instr[24:20];
assign rs1 = ds_instr[19:15];
assign rd = ds_instr[11: 7];
assign immI = {{20{ds_instr[31]}}, ds_instr[31:20]};
assign immU = { ds_instr[31:12] , 12'b0};
assign immS = {{20{ds_instr[31]}}, ds_instr[31:25], ds_instr[11: 7]};
assign immB = {{20{ds_instr[31]}}, ds_instr[7] , ds_instr[30:25], ds_instr[11: 8], 1'b0};
assign immJ = {{12{ds_instr[31]}}, ds_instr[19:12], ds_instr[20] , ds_instr[30:21], 1'b0};
ctrsignal u_ctrsignal(
.OP(op),
.func3 (func3 ),
.func7 (func7 ),
.ExtOp (ExtOp ),
.ALUAsrc (ALUAsrc ),
.ALUBsrc (ALUBsrc ),
.ALUctr (ALUctr ),
.RegWr (RegWr ),
.MemtoReg (MemtoReg),
.MemWr (MemWr ),
.Branch (Branch ),
.Jump (Jump ),
.Load (Load ),
.Store (Store ),
.shamt (shamt )
);
assign imm = ({32{ExtOp[4]}} & immU)
| ({32{ExtOp[3]}} & immJ)
| ({32{ExtOp[2]}} & immS)
| ({32{ExtOp[1]}} & immI)
| ({32{ExtOp[0]}} & immB);
assign rf_raddr1 = rs1;
assign rf_raddr2 = rs2;
regfile u_regfile(
.clk (clk ),
.reset (reset ),
.raddr1 (rf_raddr1),
.rdata1 (rf_rdata1),
.raddr2 (rf_raddr2),
.rdata2 (rf_rdata2),
.raddr3 (rf_raddr ),
.rdata3 (rf_rdata ),
.we (rf_we ),
.waddr (rf_waddr ),
.wdata (rf_wdata )
);
assign rs1_value = rf_rdata1;
assign rs2_value = rf_rdata2;
assign dh_flush = ^Jump || ^Branch;
assign dh_stall = ^Branch;
endmodule

73
cpu_rv32i.srcs/sources_1/new/if_stage.v Normal file
View File

@@ -0,0 +1,73 @@
`timescale 1ns / 1ps
`include "cpu.h"
module if_stage(
input clk,
input reset,
input fs_flush,
input fs_stall,
input ds_allowin,
input [`BR_BUS_WD -1:0] br_bus,
output fs_to_ds_valid,
output [`FS_TO_DS_BUS_WD -1:0] fs_to_ds_bus,
output instr_ram_en,
output [ 3:0] instr_ram_wen,
output [31:0] instr_ram_addr,
output [31:0] instr_ram_wdata,
input [31:0] instr_ram_rdata
);
reg fs_valid;
wire fs_ready_go;
wire fs_allowin;
wire to_fs_valid;
wire [31:0] seq_pc;
wire [31:0] nextpc;
wire br_taken;
wire [31:0] br_target;
assign {br_taken, br_target} = br_bus;
wire [31:0] fs_instr;
reg [31:0] fs_pc;
assign fs_to_ds_bus = {fs_instr, fs_pc};
assign to_fs_valid = ~reset;
assign seq_pc = fs_pc + 3'h4;
assign nextpc = br_taken ? br_target :
fs_stall ? fs_pc :
seq_pc;
// IF stage
assign fs_ready_go = !(fs_flush);
assign fs_allowin = !fs_valid || fs_ready_go && ds_allowin;
assign fs_to_ds_valid = fs_valid && fs_ready_go;
always @(posedge clk) begin
if (reset) begin
fs_valid <= 1'b0;
end
else if (fs_allowin) begin
fs_valid <= to_fs_valid;
end
if (reset || (fs_flush && !fs_stall)) begin
fs_pc <= 32'hfffffffc;
end
else if (to_fs_valid && fs_allowin) begin
fs_pc <= nextpc;
end
end
assign instr_ram_en = to_fs_valid && fs_allowin;
assign instr_ram_wen = 4'h0;
assign instr_ram_addr = nextpc;
assign instr_ram_wdata = 32'b0;
assign fs_instr = instr_ram_rdata;
endmodule

125
cpu_rv32i.srcs/sources_1/new/mem_stage.v Normal file
View File

@@ -0,0 +1,125 @@
`timescale 1ns / 1ps
`include "cpu.h"
module mem_stage(
input clk ,
input reset ,
input ms_flush,
input ws_allowin ,
output ms_allowin ,
//from es
input es_to_ms_valid,
input [`ES_TO_MS_BUS_WD -1:0] es_to_ms_bus ,
//to es
output [`MS_TO_ES_BUS_WD -1:0] ms_to_es_bus ,
//to fw
output [`MS_TO_FW_BUS_WD -1:0] ms_to_fw_bus ,
//to ws
output ms_to_ws_valid,
output [`MS_TO_WS_BUS_WD -1:0] ms_to_ws_bus ,
output [`BR_BUS_WD -1:0] br_bus ,
//from data-sram
input [31 :0] data_ram_rdata
);
reg ms_valid;
wire ms_ready_go;
reg [`ES_TO_MS_BUS_WD -1:0] es_to_ms_bus_r;
wire [ 5:0] ms_Branch ;
wire [ 1:0] ms_Jump ;
wire ms_MemtoReg ;
wire ms_MemWr ;
wire ms_RegWr ;
wire [ 4:0] ms_Load ;
wire [ 4:0] ms_rd ;
wire [ 4:0] ms_rs1 ;
wire [ 4:0] ms_rs2 ;
wire [31:0] ms_alu_result;
wire [31:0] ms_pc ;
wire [31:0] br_target ;
wire ms_Carry ;
wire ms_Sign ;
wire ms_Overflow ;
wire ms_Zero ;
wire br_taken ;
assign { ms_Carry , //119:119
ms_Sign , //118:118
ms_Overflow , //117:117
ms_Zero , //116:116
br_target , //115:84
ms_Load , //83 :79
ms_Branch , //78 :73
ms_Jump , //72 :71
ms_MemtoReg , //70 :70
ms_RegWr , //69 :69
ms_rd , //68 :64
ms_alu_result , //63 :32
ms_pc //31 :0
} = es_to_ms_bus_r;
wire [31:0] mem_result;
assign br_bus = { br_taken, //32:32
br_target //31:0
};
assign ms_to_es_bus = { ms_alu_result};
assign ms_to_fw_bus = { ms_rd , ms_RegWr};
assign ms_to_ws_bus = { ms_MemtoReg , //102:102
ms_RegWr , //101:101
mem_result , //100:69
ms_rd , //68 :64
ms_alu_result , //63 :32
ms_pc //31 :0
};
assign ms_ready_go = 1'b1;
assign ms_allowin = !ms_valid || ms_ready_go && ws_allowin;
assign ms_to_ws_valid = ms_valid && ms_ready_go;
always @(posedge clk) begin
if (reset) begin
ms_valid <= 1'b0;
end
else if (ms_allowin) begin
ms_valid <= es_to_ms_valid;
end
if (reset || ms_flush) begin
es_to_ms_bus_r <= 0;
end
else if (es_to_ms_valid && ms_allowin) begin
es_to_ms_bus_r <= es_to_ms_bus;
end
// else begin
// es_to_ms_bus_r <= 0;
// end
end
assign mem_result = (ms_Load[0] || ms_Load[3]) ? ((ms_alu_result[1:0] == 2'b00) ? {{24{ms_Load[3] ? data_ram_rdata[ 7] : 1'b0 }}, data_ram_rdata[ 7:0] }:
(ms_alu_result[1:0] == 2'b01) ? {{16{ms_Load[3] ? data_ram_rdata[ 7] : 1'b0 }}, data_ram_rdata[ 7:0], 8'b0}:
(ms_alu_result[1:0] == 2'b10) ? {{ 8{ms_Load[3] ? data_ram_rdata[ 7] : 1'b0 }}, data_ram_rdata[ 7:0], 16'b0}:
{ data_ram_rdata[ 7:0], 24'b0}
) :
(ms_Load[1] || ms_Load[4]) ? ((ms_alu_result[1:0] == 2'b00) ? {{16{ms_Load[4] ? data_ram_rdata[15] : 1'b0 }}, data_ram_rdata[15:0] }:
{ data_ram_rdata[15:0], 16'b0}
) :
ms_Load[2] ? ( data_ram_rdata
) : 32'b0;
assign br_taken = ( ms_Branch[0] & ms_Zero )
| ( ms_Branch[1] & ~ms_Zero )
| ( ms_Branch[2] & (ms_Sign != ms_Overflow) )
| ( ms_Branch[3] & (ms_Zero | (ms_Sign == ms_Overflow)))
| ( ms_Branch[4] & ms_Carry )
| ( ms_Branch[5] & (ms_Zero | ~ms_Carry ))
| (^ms_Jump );
endmodule

45
cpu_rv32i.srcs/sources_1/new/regfile.v Normal file
View File

@@ -0,0 +1,45 @@
module regfile(
input clk,
input reset,
// READ PORT 1
input [ 4:0] raddr1,
output [31:0] rdata1,
// READ PORT 2
input [ 4:0] raddr2,
output [31:0] rdata2,
// READ PORT 3
input [ 4:0] raddr3,
output [31:0] rdata3,
// WRITE PORT
input we, //write enable, HIGH valid
input [ 4:0] waddr,
input [31:0] wdata
);
reg [31:0] rf[31:0];
integer i = 0;
//WRITE
always @(posedge clk) begin
if (reset) begin
for(i = 0; i < 32; i = i + 1) begin
rf[i] <= 32'b0;
end
end
else if (we) begin
rf[waddr]<= wdata;
end
end
//READ OUT 1
assign rdata1 = (we & (raddr1 == waddr)) ? wdata :
( raddr1 == 5'b0 ) ? 32'b0 :
rf[raddr1];
//READ OUT 2
assign rdata2 = (we & (raddr2 == waddr)) ? wdata :
( raddr2 == 5'b0 ) ? 32'b0 :
rf[raddr2];
//READ OUT 3
assign rdata3 = (we & (raddr3 == waddr)) ? wdata :
( raddr3 == 5'b0 ) ? 32'b0 :
rf[raddr3];
endmodule

95
cpu_rv32i.srcs/sources_1/new/soc_top.v Normal file
View File

@@ -0,0 +1,95 @@
`timescale 1ns / 1ps
module soc_top(
input resetn,
input clk,
input [ 4:0] switch,
output [15:0] led
);
wire cpu_clk;
reg cpu_resetn;
wire [31:0] led32;
assign led = led32[15:0];
always @(posedge cpu_clk)
begin
cpu_resetn <= resetn;
end
pll u_pll(
.clk_in1 (clk),
.clk_out1 (cpu_clk)
);
//cpu instr ram
wire cpu_instr_en;
wire [ 3:0] cpu_instr_wen;
wire [31:0] cpu_instr_addr;
wire [31:0] cpu_instr_wdata;
wire [31:0] cpu_instr_rdata;
//cpu data ram
wire cpu_data_en;
wire [ 3:0] cpu_data_wen;
wire [31:0] cpu_data_addr;
wire [31:0] cpu_data_wdata;
wire [31:0] cpu_data_rdata;
//debug signals
wire [31:0] debug_wb_pc;
wire [ 3:0] debug_wb_rf_wen;
wire [ 4:0] debug_wb_rf_wnum;
wire [31:0] debug_wb_rf_wdata;
cpu_top cpu(
.clk (cpu_clk ),
.resetn (cpu_resetn),
.instr_ram_en (cpu_instr_en ),
.instr_ram_wen (cpu_instr_wen ),
.instr_ram_addr (cpu_instr_addr ),
.instr_ram_wdata (cpu_instr_wdata),
.instr_ram_rdata (cpu_instr_rdata),
.data_ram_en (cpu_data_en ),
.data_ram_wen (cpu_data_wen ),
.data_ram_addr (cpu_data_addr ),
.data_ram_wdata (cpu_data_wdata),
.data_ram_rdata (cpu_data_rdata),
//debug
.debug_wb_pc (debug_wb_pc ),
.debug_wb_rf_wen (debug_wb_rf_wen ),
.debug_wb_rf_wnum (debug_wb_rf_wnum ),
.debug_wb_rf_wdata(debug_wb_rf_wdata),
.rf_raddr (switch ),
.rf_rdata (led32 )
);
//instr ram
instr_ram instr_ram
(
.clka (cpu_clk ),
.ena (cpu_instr_en ),
.wea (cpu_instr_wen ), //3:0
.addra (cpu_instr_addr[17:2]), //15:0
.dina (cpu_instr_wdata ), //31:0
.douta (cpu_instr_rdata ) //31:0
);
//data ram
data_ram data_ram
(
.clka (cpu_clk ),
.ena (cpu_data_en ),
.wea (cpu_data_wen ), //3:0
.addra (cpu_data_addr[17:2] ), //15:0
.dina (cpu_data_wdata ), //31:0
.douta (cpu_data_rdata ) //31:0
);
endmodule

84
cpu_rv32i.srcs/sources_1/new/wb_stage.v Normal file
View File

@@ -0,0 +1,84 @@
`timescale 1ns / 1ps
`include "cpu.h"
module wb_stage(
input clk ,
input reset ,
input ws_flush,
output ws_allowin ,
input ms_to_ws_valid,
input [`MS_TO_WS_BUS_WD -1:0] ms_to_ws_bus,
//to rf: for write back
output [`WS_TO_RF_BUS_WD -1:0] ws_to_rf_bus,
//to es
output [`WS_TO_ES_BUS_WD -1:0] ws_to_es_bus,
//trace debug interface
output [31:0] debug_wb_pc,
output [ 3:0] debug_wb_rf_wen ,
output [ 4:0] debug_wb_rf_wnum,
output [31:0] debug_wb_rf_wdata
);
reg ws_valid;
wire ws_ready_go;
reg [`MS_TO_WS_BUS_WD -1:0] ms_to_ws_bus_r;
wire ws_MemtoReg ;
wire ws_RegWr ;
wire [31:0] ws_mem_result ;
wire [ 4:0] ws_rd ;
wire [31:0] ws_alu_result ;
wire [31:0] ws_pc ;
assign { ws_MemtoReg , //102:102
ws_RegWr , //101:101
ws_mem_result , //100:69
ws_rd , //68 :64
ws_alu_result , //63 :32
ws_pc //31 :0
} = ms_to_ws_bus_r;
wire rf_we;
wire [4 :0] rf_waddr;
wire [31:0] rf_wdata;
assign ws_to_rf_bus = {rf_we , //37:37
rf_waddr, //36:32
rf_wdata //31:0
};
assign ws_to_es_bus = {rf_wdata};
assign ws_ready_go = 1'b1;
assign ws_allowin = !ws_valid || ws_ready_go;
always @(posedge clk) begin
if (reset) begin
ws_valid <= 1'b0;
end
else if (ws_allowin) begin
ws_valid <= ms_to_ws_valid;
end
if (reset || ws_flush) begin
ms_to_ws_bus_r <= 0;
end
else if (ms_to_ws_valid && ws_allowin) begin
ms_to_ws_bus_r <= ms_to_ws_bus;
end
// else begin
// ms_to_ws_bus_r <= 0;
// end
end
assign rf_we = ws_RegWr && ws_valid;
assign rf_waddr = ws_rd;
assign rf_wdata = ws_MemtoReg ? ws_mem_result :
ws_alu_result;
// debug info generate
assign debug_wb_pc = ws_pc;
assign debug_wb_rf_wen = {4{rf_we}};
assign debug_wb_rf_wnum = ws_rd;
assign debug_wb_rf_wdata = rf_wdata;
endmodule

BIN
cpu_rv32i.srcs/utils_1/imports/synth_1/soc_top.dcp Normal file
View File

Binary file not shown.

496
cpu_rv32i.xpr Normal file
View File

@@ -0,0 +1,496 @@
<?xml version="1.0" encoding="UTF-8"?>
<!-- Product Version: Vivado v2022.2 (64-bit) -->
<!-- -->
<!-- Copyright 1986-2022 Xilinx, Inc. All Rights Reserved. -->
<Project Version="7" Minor="61" Path="D:/Project/Vivado/cpu_rv32i/cpu_rv32i.xpr">
<DefaultLaunch Dir="$PRUNDIR"/>
<Configuration>
<Option Name="Id" Val="d668b4ca7b0548d18ef68582580e3a65"/>
<Option Name="Part" Val="xc7a100tcsg324-1"/>
<Option Name="CompiledLibDir" Val="$PCACHEDIR/compile_simlib"/>
<Option Name="CompiledLibDirXSim" Val=""/>
<Option Name="CompiledLibDirModelSim" Val="$PCACHEDIR/compile_simlib/modelsim"/>
<Option Name="CompiledLibDirQuesta" Val="$PCACHEDIR/compile_simlib/questa"/>
<Option Name="CompiledLibDirXcelium" Val="$PCACHEDIR/compile_simlib/xcelium"/>
<Option Name="CompiledLibDirVCS" Val="$PCACHEDIR/compile_simlib/vcs"/>
<Option Name="CompiledLibDirRiviera" Val="$PCACHEDIR/compile_simlib/riviera"/>
<Option Name="CompiledLibDirActivehdl" Val="$PCACHEDIR/compile_simlib/activehdl"/>
<Option Name="SimulatorInstallDirModelSim" Val=""/>
<Option Name="SimulatorInstallDirQuesta" Val=""/>
<Option Name="SimulatorInstallDirXcelium" Val=""/>
<Option Name="SimulatorInstallDirVCS" Val=""/>
<Option Name="SimulatorInstallDirRiviera" Val=""/>
<Option Name="SimulatorInstallDirActiveHdl" Val=""/>
<Option Name="SimulatorGccInstallDirModelSim" Val=""/>
<Option Name="SimulatorGccInstallDirQuesta" Val=""/>
<Option Name="SimulatorGccInstallDirXcelium" Val=""/>
<Option Name="SimulatorGccInstallDirVCS" Val=""/>
<Option Name="SimulatorGccInstallDirRiviera" Val=""/>
<Option Name="SimulatorGccInstallDirActiveHdl" Val=""/>
<Option Name="SimulatorVersionXsim" Val="2022.2"/>
<Option Name="SimulatorVersionModelSim" Val="2022.2"/>
<Option Name="SimulatorVersionQuesta" Val="2022.2"/>
<Option Name="SimulatorVersionXcelium" Val="21.09.002"/>
<Option Name="SimulatorVersionVCS" Val="S-2021.09"/>
<Option Name="SimulatorVersionRiviera" Val="2022.04"/>
<Option Name="SimulatorVersionActiveHdl" Val="13.0"/>
<Option Name="SimulatorGccVersionXsim" Val="6.2.0"/>
<Option Name="SimulatorGccVersionModelSim" Val="7.4.0"/>
<Option Name="SimulatorGccVersionQuesta" Val="7.4.0"/>
<Option Name="SimulatorGccVersionXcelium" Val="9.3.0"/>
<Option Name="SimulatorGccVersionVCS" Val="9.2.0"/>
<Option Name="SimulatorGccVersionRiviera" Val="9.3.0"/>
<Option Name="SimulatorGccVersionActiveHdl" Val="9.3.0"/>
<Option Name="BoardPart" Val=""/>
<Option Name="SourceMgmtMode" Val="DisplayOnly"/>
<Option Name="ActiveSimSet" Val="sim_1"/>
<Option Name="DefaultLib" Val="xil_defaultlib"/>
<Option Name="ProjectType" Val="Default"/>
<Option Name="IPOutputRepo" Val="$PCACHEDIR/ip"/>
<Option Name="IPDefaultOutputPath" Val="$PGENDIR/sources_1"/>
<Option Name="IPCachePermission" Val="read"/>
<Option Name="IPCachePermission" Val="write"/>
<Option Name="EnableCoreContainer" Val="FALSE"/>
<Option Name="EnableResourceEstimation" Val="FALSE"/>
<Option Name="SimCompileState" Val="TRUE"/>
<Option Name="CreateRefXciForCoreContainers" Val="FALSE"/>
<Option Name="IPUserFilesDir" Val="$PIPUSERFILESDIR"/>
<Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
<Option Name="EnableBDX" Val="FALSE"/>
<Option Name="WTXSimLaunchSim" Val="250"/>
<Option Name="WTModelSimLaunchSim" Val="0"/>
<Option Name="WTQuestaLaunchSim" Val="0"/>
<Option Name="WTIesLaunchSim" Val="0"/>
<Option Name="WTVcsLaunchSim" Val="0"/>
<Option Name="WTRivieraLaunchSim" Val="0"/>
<Option Name="WTActivehdlLaunchSim" Val="0"/>
<Option Name="WTXSimExportSim" Val="62"/>
<Option Name="WTModelSimExportSim" Val="62"/>
<Option Name="WTQuestaExportSim" Val="62"/>
<Option Name="WTIesExportSim" Val="0"/>
<Option Name="WTVcsExportSim" Val="62"/>
<Option Name="WTRivieraExportSim" Val="62"/>
<Option Name="WTActivehdlExportSim" Val="62"/>
<Option Name="GenerateIPUpgradeLog" Val="TRUE"/>
<Option Name="XSimRadix" Val="hex"/>
<Option Name="XSimTimeUnit" Val="ns"/>
<Option Name="XSimArrayDisplayLimit" Val="1024"/>
<Option Name="XSimTraceLimit" Val="65536"/>
<Option Name="SimTypes" Val="rtl"/>
<Option Name="SimTypes" Val="bfm"/>
<Option Name="SimTypes" Val="tlm"/>
<Option Name="SimTypes" Val="tlm_dpi"/>
<Option Name="MEMEnableMemoryMapGeneration" Val="TRUE"/>
<Option Name="DcpsUptoDate" Val="TRUE"/>
<Option Name="ClassicSocBoot" Val="FALSE"/>
<Option Name="LocalIPRepoLeafDirName" Val="ip_repo"/>
</Configuration>
<FileSets Version="1" Minor="31">
<FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1" RelGenDir="$PGENDIR/sources_1">
<Filter Type="Srcs"/>
<File Path="$PSRCDIR/sources_1/new/alu.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/new/cpu.h">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
<Attr Name="IsVisible" Val="1"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/new/cpu_top.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/new/ctrsignal.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/new/exe_stage.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/new/hazards.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/new/id_stage.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/new/if_stage.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/new/mem_stage.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/new/regfile.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/new/wb_stage.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/new/soc_top.v">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/ip/coe_longxin/add-riscv32-nemu.coe">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/ip/instr_ram/raw_instr.coe">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/ip/data_ram/raw_data.coe">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/ip/coe_longxin/quick-sort-riscv32-nemu.coe">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/ip/instr_ram/test.coe">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/ip/instr_ram/bubble_sort_instr.coe">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PSRCDIR/sources_1/ip/data_ram/bubble_sort_data.coe">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="soc_top"/>
<Option Name="dataflowViewerSettings" Val="min_width=16"/>
</Config>
</FileSet>
<FileSet Name="constrs_1" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1" RelGenDir="$PGENDIR/constrs_1">
<Filter Type="Constrs"/>
<File Path="$PSRCDIR/constrs_1/imports/Vivado/Nexys4DDR.xdc">
<FileInfo>
<Attr Name="ImportPath" Val="$PPRDIR/../CPU_practice/CPU_practice.srcs/constrs_1/imports/Vivado/Nexys4DDR.xdc"/>
<Attr Name="ImportTime" Val="1667733921"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
</FileInfo>
</File>
<Config>
<Option Name="TargetConstrsFile" Val="$PSRCDIR/constrs_1/imports/Vivado/Nexys4DDR.xdc"/>
<Option Name="ConstrsType" Val="XDC"/>
</Config>
</FileSet>
<FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1" RelGenDir="$PGENDIR/sim_1">
<Filter Type="Srcs"/>
<File Path="$PSRCDIR/sim_1/imports/new/cpu_tb.v">
<FileInfo>
<Attr Name="ImportPath" Val="$PPRDIR/../CPU_practice/CPU_practice.srcs/sim_1/new/cpu_tb.v"/>
<Attr Name="ImportTime" Val="1667736532"/>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<File Path="$PPRDIR/cpu_tb_behav.wcfg">
<FileInfo>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<Config>
<Option Name="DesignMode" Val="RTL"/>
<Option Name="TopModule" Val="cpu_tb"/>
<Option Name="TopLib" Val="xil_defaultlib"/>
<Option Name="TopAutoSet" Val="TRUE"/>
<Option Name="TransportPathDelay" Val="0"/>
<Option Name="TransportIntDelay" Val="0"/>
<Option Name="SelectedSimModel" Val="rtl"/>
<Option Name="PamDesignTestbench" Val=""/>
<Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
<Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
<Option Name="PamPseudoTop" Val="pseudo_tb"/>
<Option Name="SrcSet" Val="sources_1"/>
<Option Name="XSimWcfgFile" Val="$PPRDIR/cpu_tb_behav.wcfg"/>
<Option Name="xsim.simulate.log_all_signals" Val="true"/>
</Config>
</FileSet>
<FileSet Name="utils_1" Type="Utils" RelSrcDir="$PSRCDIR/utils_1" RelGenDir="$PGENDIR/utils_1">
<Filter Type="Utils"/>
<File Path="$PSRCDIR/utils_1/imports/synth_1/soc_top.dcp">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedInSteps" Val="synth_1"/>
<Attr Name="AutoDcp" Val="1"/>
</FileInfo>
</File>
<Config>
<Option Name="TopAutoSet" Val="TRUE"/>
</Config>
</FileSet>
<FileSet Name="data_ram" Type="BlockSrcs" RelSrcDir="$PSRCDIR/data_ram" RelGenDir="$PGENDIR/data_ram">
<File Path="$PSRCDIR/sources_1/ip/data_ram/data_ram.xci">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<Config>
<Option Name="TopModule" Val="data_ram"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="instr_ram" Type="BlockSrcs" RelSrcDir="$PSRCDIR/instr_ram" RelGenDir="$PGENDIR/instr_ram">
<File Path="$PSRCDIR/sources_1/ip/instr_ram/instr_ram.xci">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<Config>
<Option Name="TopModule" Val="instr_ram"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
<FileSet Name="pll" Type="BlockSrcs" RelSrcDir="$PSRCDIR/pll" RelGenDir="$PGENDIR/pll">
<File Path="$PSRCDIR/sources_1/ip/pll/pll.xci">
<FileInfo>
<Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/>
</FileInfo>
</File>
<Config>
<Option Name="TopModule" Val="pll"/>
<Option Name="UseBlackboxStub" Val="1"/>
</Config>
</FileSet>
</FileSets>
<Simulators>
<Simulator Name="XSim">
<Option Name="Description" Val="Vivado Simulator"/>
<Option Name="CompiledLib" Val="0"/>
</Simulator>
<Simulator Name="ModelSim">
<Option Name="Description" Val="ModelSim Simulator"/>
</Simulator>
<Simulator Name="Questa">
<Option Name="Description" Val="Questa Advanced Simulator"/>
</Simulator>
<Simulator Name="Riviera">
<Option Name="Description" Val="Riviera-PRO Simulator"/>
</Simulator>
<Simulator Name="ActiveHDL">
<Option Name="Description" Val="Active-HDL Simulator"/>
</Simulator>
</Simulators>
<Runs Version="1" Minor="19">
<Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7a100tcsg324-1" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="true" IncrementalCheckpoint="$PSRCDIR/utils_1/imports/synth_1/soc_top.dcp" WriteIncrSynthDcp="false" State="current" Dir="$PRUNDIR/synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/synth_1">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2022">
<Desc>Vivado Synthesis Defaults</Desc>
</StratHandle>
<Step Id="synth_design"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2022"/>
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
<RQSFiles/>
</Run>
<Run Id="data_ram_synth_1" Type="Ft3:Synth" SrcSet="data_ram" Part="xc7a100tcsg324-1" ConstrsSet="data_ram" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/data_ram_synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/data_ram_synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/data_ram_synth_1">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2022"/>
<Step Id="synth_design"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2022"/>
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
<RQSFiles/>
</Run>
<Run Id="instr_ram_synth_1" Type="Ft3:Synth" SrcSet="instr_ram" Part="xc7a100tcsg324-1" ConstrsSet="instr_ram" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/instr_ram_synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/instr_ram_synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/instr_ram_synth_1">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2022">
<Desc>Vivado Synthesis Defaults</Desc>
</StratHandle>
<Step Id="synth_design"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2022"/>
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
<RQSFiles/>
</Run>
<Run Id="pll_synth_1" Type="Ft3:Synth" SrcSet="pll" Part="xc7a100tcsg324-1" ConstrsSet="pll" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/pll_synth_1" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/pll_synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/pll_synth_1">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2022">
<Desc>Vivado Synthesis Defaults</Desc>
</StratHandle>
<Step Id="synth_design"/>
</Strategy>
<GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
<ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2022"/>
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
<RQSFiles/>
</Run>
<Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7a100tcsg324-1" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" State="current" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2022">
<Desc>Default settings for Implementation.</Desc>
</StratHandle>
<Step Id="init_design"/>
<Step Id="opt_design"/>
<Step Id="power_opt_design"/>
<Step Id="place_design"/>
<Step Id="post_place_power_opt_design"/>
<Step Id="phys_opt_design"/>
<Step Id="route_design"/>
<Step Id="post_route_phys_opt_design"/>
<Step Id="write_bitstream"/>
</Strategy>
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2022"/>
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
<RQSFiles/>
</Run>
<Run Id="data_ram_impl_1" Type="Ft2:EntireDesign" Part="xc7a100tcsg324-1" ConstrsSet="data_ram" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="data_ram_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/data_ram_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/data_ram_impl_1">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2022"/>
<Step Id="init_design"/>
<Step Id="opt_design"/>
<Step Id="power_opt_design"/>
<Step Id="place_design"/>
<Step Id="post_place_power_opt_design"/>
<Step Id="phys_opt_design"/>
<Step Id="route_design"/>
<Step Id="post_route_phys_opt_design"/>
<Step Id="write_bitstream"/>
</Strategy>
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2022"/>
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
<RQSFiles/>
</Run>
<Run Id="instr_ram_impl_1" Type="Ft2:EntireDesign" Part="xc7a100tcsg324-1" ConstrsSet="instr_ram" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="instr_ram_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/instr_ram_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/instr_ram_impl_1">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2022">
<Desc>Default settings for Implementation.</Desc>
</StratHandle>
<Step Id="init_design"/>
<Step Id="opt_design"/>
<Step Id="power_opt_design"/>
<Step Id="place_design"/>
<Step Id="post_place_power_opt_design"/>
<Step Id="phys_opt_design"/>
<Step Id="route_design"/>
<Step Id="post_route_phys_opt_design"/>
<Step Id="write_bitstream"/>
</Strategy>
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2022"/>
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
<RQSFiles/>
</Run>
<Run Id="pll_impl_1" Type="Ft2:EntireDesign" Part="xc7a100tcsg324-1" ConstrsSet="pll" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="pll_synth_1" IncludeInArchive="false" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/pll_impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/pll_impl_1">
<Strategy Version="1" Minor="2">
<StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2022">
<Desc>Default settings for Implementation.</Desc>
</StratHandle>
<Step Id="init_design"/>
<Step Id="opt_design"/>
<Step Id="power_opt_design"/>
<Step Id="place_design"/>
<Step Id="post_place_power_opt_design"/>
<Step Id="phys_opt_design"/>
<Step Id="route_design"/>
<Step Id="post_route_phys_opt_design"/>
<Step Id="write_bitstream"/>
</Strategy>
<ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2022"/>
<Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
<RQSFiles/>
</Run>
</Runs>
<Board/>
<DashboardSummary Version="1" Minor="0">
<Dashboards>
<Dashboard Name="default_dashboard">
<Gadgets>
<Gadget Name="drc_1" Type="drc" Version="1" Row="2" Column="0">
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_drc_0 "/>
</Gadget>
<Gadget Name="methodology_1" Type="methodology" Version="1" Row="2" Column="1">
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_methodology_0 "/>
</Gadget>
<Gadget Name="power_1" Type="power" Version="1" Row="1" Column="0">
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_power_0 "/>
</Gadget>
<Gadget Name="timing_1" Type="timing" Version="1" Row="0" Column="1">
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_timing_summary_0 "/>
</Gadget>
<Gadget Name="utilization_1" Type="utilization" Version="1" Row="0" Column="0">
<GadgetParam Name="REPORTS" Type="string_list" Value="synth_1#synth_1_synth_report_utilization_0 "/>
<GadgetParam Name="RUN.STEP" Type="string" Value="synth_design"/>
<GadgetParam Name="RUN.TYPE" Type="string" Value="synthesis"/>
</Gadget>
<Gadget Name="utilization_2" Type="utilization" Version="1" Row="1" Column="1">
<GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_place_report_utilization_0 "/>
</Gadget>
</Gadgets>
</Dashboard>
<CurrentDashboard>default_dashboard</CurrentDashboard>
</Dashboards>
</DashboardSummary>
</Project>

1350
cpu_tb_behav.wcfg Normal file
View File

File diff suppressed because it is too large Load Diff

BIN
doc/RISC-V-Reader-Chinese-v2p1.pdf Normal file
View File

Binary file not shown.

BIN
doc/coe_longxin.zip Normal file
View File

Binary file not shown.

BIN
doc/risc-v32i.png Normal file
View File

Binary file not shown.
Side by Side

After

Width:  |  Height:  |  Size: 684 KiB

BIN
doc/riscv-test32.zip Normal file
View File

Binary file not shown.

BIN
doc/控制信号对照表.xlsx Normal file
View File

Binary file not shown.