init repo: update to RV32IMA (M mode)

.gitignore

@@ -0,0 +1,37 @@
+*
+!*/
+
+# track this file or dic
+!.gitignore
+!readme.md
+
+doc/**
+!others/**
+
+# vivado
+!rv_cpu.xpr
+
+## srcs
+!rv_cpu.srcs/constrs_1/**
+
+!rv_cpu.srcs/sources_1/ip/*/*.xci
+!rv_cpu.srcs/sources_1/ip/*/*.coe
+
+!rv_cpu.srcs/sources_1/new/**
+!rv_cpu.srcs/sources_1/imports/**
+!rv_cpu.srcs/sources_1/bd/**
+
+## sims
+!rv_cpu.srcs/sim_1/**
+
+!rv_cpu.sim/sim_1/behav/modelsim/*.do
+rv_cpu.sim/sim_1/behav/xsim/*.wdb 
+!rv_cpu.sim/sim_1/*.wcfg
+
+## bits
+!rv_cpu.runs/impl_1/*.bit
+!rv_cpu.runs/impl_1/*.bin
+!rv_cpu.runs/impl_1/*.ltx
+!rv_cpu.runs/bits/*.bit
+!rv_cpu.runs/bits/*.bin
+!rv_cpu.runs/bits/*.ltx