fix whole structure

2025-03-19 11:16:05 +08:00
parent cf3f100d53
commit dbf9cb6023
10 changed files with 503 additions and 550 deletions
--- a/ddr_general_design.srcs/sources_1/ip/ddr_ctrl/ddr_ctrl.xci
+++ b/ddr_general_design.srcs/sources_1/ip/ddr_ctrl/ddr_ctrl.xci
@@ -6,7 +6,7 @@
  <spirit:version>1.0</spirit:version>
  <spirit:componentInstances>
    <spirit:componentInstance>
-      <spirit:instanceName>ddr3_mig</spirit:instanceName>
+      <spirit:instanceName>ddr_ctrl</spirit:instanceName>
      <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="mig_7series" spirit:version="4.2"/>
      <spirit:configurableElementValues>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.ARESETN.INSERT_VIP">0</spirit:configurableElementValue>
@@ -1092,34 +1092,34 @@
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.SYS_CLK_I.FREQ_HZ">100000000</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.SYS_CLK_I.INSERT_VIP">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.SYS_CLK_I.PHASE">0.000</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.ADDR_WIDTH">33</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.ADDR_WIDTH">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.ARUSER_WIDTH">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.AWUSER_WIDTH">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.BUSER_WIDTH">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.CLK_DOMAIN"/>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.DATA_WIDTH">512</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.DATA_WIDTH">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_BRESP">1</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_BRESP">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_BURST">1</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_BURST">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_CACHE">1</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_CACHE">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_LOCK">1</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_LOCK">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_PROT">1</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_PROT">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_QOS">1</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_QOS">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_REGION">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_RRESP">1</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_RRESP">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_WSTRB">1</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_WSTRB">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.ID_WIDTH">4</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.ID_WIDTH">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.INSERT_VIP">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.MAX_BURST_LENGTH">256</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.MAX_BURST_LENGTH">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_READ_OUTSTANDING">2</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_READ_OUTSTANDING">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_READ_THREADS">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_WRITE_OUTSTANDING">2</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_WRITE_OUTSTANDING">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.NUM_WRITE_THREADS">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.PHASE">0.000</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.PROTOCOL">AXI4</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.PROTOCOL">AXI4LITE</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.READ_WRITE_MODE">READ_WRITE</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.RUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.RUSER_WIDTH">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.SUPPORTS_NARROW_BURST">1</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.SUPPORTS_NARROW_BURST">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.WUSER_BITS_PER_BYTE">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI.WUSER_WIDTH">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.ADDR_WIDTH">1</spirit:configurableElementValue>
@@ -2169,14 +2169,14 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C7_UI_EXTRA_CLOCKS">FALSE</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C7_USE_AXI">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.COMBINED_INTERFACE">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_ADDR_WIDTH">33</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_ADDR_WIDTH">32</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_CTRL_ADDR_WIDTH">32</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_CTRL_DATA_WIDTH">32</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_CTRL_ID_WIDTH">4</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_CTRL_MEM_SIZE">1048576</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_DATA_WIDTH">512</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_DATA_WIDTH">32</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_ID_WIDTH">4</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_MEM_SIZE">8589934592</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_S_AXI_MEM_SIZE">1048576</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR2_ADDR_WIDTH">8</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR2_BANK_WIDTH">3</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR2_CKE_WIDTH">1</spirit:configurableElementValue>
@@ -2196,24 +2196,24 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR2_USE_ODT_PORT">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR2_nCK_PER_CLK">2</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR2_nCS_PER_RANK">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_ADDR_WIDTH">30</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_ADDR_WIDTH">8</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_BANK_WIDTH">3</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_CKE_WIDTH">2</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_CKE_WIDTH">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_CK_WIDTH">2</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_CK_WIDTH">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_CS_WIDTH">2</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_CS_WIDTH">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_DATA_WIDTH">64</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_DATA_WIDTH">8</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_DEBUG_PORT">OFF</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_DM_WIDTH">8</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_DM_WIDTH">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_DQS_CNT_WIDTH">3</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_DQS_CNT_WIDTH">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_DQS_WIDTH">8</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_DQS_WIDTH">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_DQ_WIDTH">64</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_DQ_WIDTH">8</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_ODT_WIDTH">2</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_ODT_WIDTH">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_REG_CTRL">OFF</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_ROW_WIDTH">16</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_ROW_WIDTH">14</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_USE_CS_PORT">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_USE_DM_PORT">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_USE_ODT_PORT">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_nCK_PER_CLK">4</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_nCK_PER_CLK">2</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDR3_nCS_PER_RANK">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDRX_ADDR_WIDTH">8</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DDRX_DATA_WIDTH">8</spirit:configurableElementValue>
@@ -2221,7 +2221,7 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DEBUG_PORT">OFF</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.DQS_CNT_WIDTH">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.ECC">OFF</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.FREQ_HZ">100000000</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.FREQ_HZ">100.0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.IS_CLK_SHARED">FALSE</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.LPDDR2_ADDR_WIDTH">8</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.LPDDR2_BANK_WIDTH">3</spirit:configurableElementValue>
@@ -2252,8 +2252,8 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.MMCM_CLKOUT3_FREQ">10</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.MMCM_CLKOUT4_EN">FALSE</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.MMCM_CLKOUT4_FREQ">10</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.MMCM_VCO">800</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.MMCM_VCO">1200.0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.NoOfControllers">1</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.NoOfControllers">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.PHASE">0.000</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.POLARITY">ACTIVE_LOW</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.QDRIIP_ADDR_WIDTH">29</spirit:configurableElementValue>
@@ -2262,7 +2262,7 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.QDRIIP_DATA_WIDTH">18</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.QDRIIP_DEBUG_PORT">OFF</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.QDRIIP_NUM_DEVICES">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.REFCLK_TYPE">NONE</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.REFCLK_TYPE">DIFF</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.RLDIII_ADDR_WIDTH">29</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.RLDIII_BANK_WIDTH">2</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.RLDIII_CK_WIDTH">1</spirit:configurableElementValue>
@@ -2295,15 +2295,15 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.RLDX_DATA_WIDTH">18</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.RLDX_DM_WIDTH">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.RLDX_nCK_PER_CLK">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.SYSCLK_TYPE">NOBUF</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.SYSCLK_TYPE">DIFF</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.TEMP_MON_CONTROL">INTERNAL</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.UI_EXTRA_CLOCKS">FALSE</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.USE_AXI">1</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.USE_AXI">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.BOARD_MIG_PARAM">Custom</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">ddr3_mig</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">ddr_ctrl</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.MIG_DONT_TOUCH_PARAM">Custom</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RESET_BOARD_INTERFACE">Custom</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.XML_INPUT_FILE">mig_a.prj</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.XML_INPUT_FILE"> </spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.ARCHITECTURE">kintex7</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BASE_BOARD_PART"/>
        <spirit:configurableElementValue spirit:referenceId="PROJECT_PARAM.BOARD_CONNECTIONS"/>
@@ -2329,141 +2329,6 @@
      <spirit:vendorExtensions>
        <xilinx:componentInstanceExtensions>
          <xilinx:configElementInfos>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.ARESETN.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_ARESETN.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_CLOCK.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_DDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_DDR3_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_LPDDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_MMCM_CLKOUT0.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_MMCM_CLKOUT1.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_MMCM_CLKOUT2.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_MMCM_CLKOUT3.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_MMCM_CLKOUT4.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_QDRIIP_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_RLDIII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_RLDII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C0_SYS_CLK_I.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_ARESETN.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_CLOCK.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_DDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_DDR3_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_LPDDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_MMCM_CLKOUT0.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_MMCM_CLKOUT1.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_MMCM_CLKOUT2.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_MMCM_CLKOUT3.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_MMCM_CLKOUT4.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_QDRIIP_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_RLDIII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_RLDII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C1_SYS_CLK_I.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C2_ARESETN.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C2_CLOCK.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C2_DDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C2_DDR3_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C2_LPDDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C2_MMCM_CLKOUT0.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C2_MMCM_CLKOUT1.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C2_MMCM_CLKOUT2.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C2_MMCM_CLKOUT3.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C2_MMCM_CLKOUT4.INSERT_VIP" xilinx:valueSource="user"/>
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            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C2_RLDIII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C2_RLDII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C2_SYS_CLK_I.INSERT_VIP" xilinx:valueSource="user"/>
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            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C3_DDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C3_DDR3_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C3_LPDDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C3_MMCM_CLKOUT0.INSERT_VIP" xilinx:valueSource="user"/>
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            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C3_MMCM_CLKOUT2.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C3_MMCM_CLKOUT3.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C3_MMCM_CLKOUT4.INSERT_VIP" xilinx:valueSource="user"/>
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            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C3_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C3_RLDIII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C3_RLDII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C3_SYS_CLK_I.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_ARESETN.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_CLOCK.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_DDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_DDR3_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_LPDDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_MMCM_CLKOUT0.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_MMCM_CLKOUT1.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_MMCM_CLKOUT2.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_MMCM_CLKOUT3.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_MMCM_CLKOUT4.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_QDRIIP_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_RLDIII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_RLDII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C4_SYS_CLK_I.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_ARESETN.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_CLOCK.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_DDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_DDR3_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_LPDDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_MMCM_CLKOUT0.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_MMCM_CLKOUT1.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_MMCM_CLKOUT2.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_MMCM_CLKOUT3.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_MMCM_CLKOUT4.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_QDRIIP_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_RLDIII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_RLDII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C5_SYS_CLK_I.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_ARESETN.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_CLOCK.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_DDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_DDR3_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_LPDDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_MMCM_CLKOUT0.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_MMCM_CLKOUT1.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_MMCM_CLKOUT2.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_MMCM_CLKOUT3.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_MMCM_CLKOUT4.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_QDRIIP_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_RLDIII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_RLDII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C6_SYS_CLK_I.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_ARESETN.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_CLOCK.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_DDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_DDR3_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_LPDDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_MMCM_CLKOUT0.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_MMCM_CLKOUT1.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_MMCM_CLKOUT2.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_MMCM_CLKOUT3.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_MMCM_CLKOUT4.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_QDRIIP_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_RLDIII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_RLDII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.C7_SYS_CLK_I.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.CLK_REF_I.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.CLOCK.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.DDR3_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.LPDDR2_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.MMCM_CLKOUT0.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.MMCM_CLKOUT1.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.MMCM_CLKOUT2.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.MMCM_CLKOUT3.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.MMCM_CLKOUT4.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.QDRIIP_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.RLDIII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.RLDII_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI.ADDR_WIDTH" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI.ARUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI.AWUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2478,7 +2343,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI.HAS_REGION" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI.HAS_WSTRB" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI.PROTOCOL" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2497,7 +2361,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI_CTRL.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI_CTRL.HAS_WSTRB" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI_CTRL.ID_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI_CTRL.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI_CTRL.PROTOCOL" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI_CTRL.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S0_AXI_CTRL.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2515,7 +2378,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S1_AXI.HAS_REGION" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S1_AXI.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S1_AXI.HAS_WSTRB" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S1_AXI.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S1_AXI.PROTOCOL" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S1_AXI.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S1_AXI.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2534,7 +2396,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S1_AXI_CTRL.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S1_AXI_CTRL.HAS_WSTRB" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S1_AXI_CTRL.ID_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S1_AXI_CTRL.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S1_AXI_CTRL.PROTOCOL" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S1_AXI_CTRL.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S1_AXI_CTRL.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2552,7 +2413,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S2_AXI.HAS_REGION" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S2_AXI.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S2_AXI.HAS_WSTRB" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S2_AXI.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S2_AXI.PROTOCOL" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S2_AXI.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S2_AXI.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2571,7 +2431,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S2_AXI_CTRL.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S2_AXI_CTRL.HAS_WSTRB" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S2_AXI_CTRL.ID_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S2_AXI_CTRL.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S2_AXI_CTRL.PROTOCOL" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S2_AXI_CTRL.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S2_AXI_CTRL.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2589,7 +2448,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S3_AXI.HAS_REGION" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S3_AXI.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S3_AXI.HAS_WSTRB" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S3_AXI.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S3_AXI.PROTOCOL" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S3_AXI.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S3_AXI.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2608,7 +2466,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S3_AXI_CTRL.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S3_AXI_CTRL.HAS_WSTRB" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S3_AXI_CTRL.ID_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S3_AXI_CTRL.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S3_AXI_CTRL.PROTOCOL" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S3_AXI_CTRL.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S3_AXI_CTRL.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2626,7 +2483,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S4_AXI.HAS_REGION" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S4_AXI.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S4_AXI.HAS_WSTRB" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S4_AXI.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S4_AXI.PROTOCOL" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S4_AXI.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S4_AXI.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2645,7 +2501,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S4_AXI_CTRL.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S4_AXI_CTRL.HAS_WSTRB" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S4_AXI_CTRL.ID_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S4_AXI_CTRL.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S4_AXI_CTRL.PROTOCOL" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S4_AXI_CTRL.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S4_AXI_CTRL.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2663,7 +2518,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S5_AXI.HAS_REGION" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S5_AXI.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S5_AXI.HAS_WSTRB" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S5_AXI.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S5_AXI.PROTOCOL" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S5_AXI.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S5_AXI.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2682,7 +2536,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S5_AXI_CTRL.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S5_AXI_CTRL.HAS_WSTRB" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S5_AXI_CTRL.ID_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S5_AXI_CTRL.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S5_AXI_CTRL.PROTOCOL" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S5_AXI_CTRL.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S5_AXI_CTRL.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2700,7 +2553,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S6_AXI.HAS_REGION" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S6_AXI.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S6_AXI.HAS_WSTRB" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S6_AXI.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S6_AXI.PROTOCOL" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S6_AXI.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S6_AXI.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2719,7 +2571,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S6_AXI_CTRL.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S6_AXI_CTRL.HAS_WSTRB" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S6_AXI_CTRL.ID_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S6_AXI_CTRL.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S6_AXI_CTRL.PROTOCOL" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S6_AXI_CTRL.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S6_AXI_CTRL.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2737,7 +2588,6 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S7_AXI.HAS_REGION" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S7_AXI.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S7_AXI.HAS_WSTRB" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S7_AXI.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S7_AXI.PROTOCOL" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S7_AXI.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S7_AXI.WUSER_WIDTH" xilinx:valueSource="constant"/>
@@ -2756,20 +2606,24 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S7_AXI_CTRL.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S7_AXI_CTRL.HAS_WSTRB" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S7_AXI_CTRL.ID_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S7_AXI_CTRL.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S7_AXI_CTRL.PROTOCOL" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S7_AXI_CTRL.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S7_AXI_CTRL.WUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.SYSTEM_RESET.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.SYS_CLK_I.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.ADDR_WIDTH" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.ARUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.AWUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.BUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.DATA_WIDTH" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_BRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_BURST" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_CACHE" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_LOCK" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_PROT" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_QOS" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_REGION" xilinx:valueSource="constant"/>
-            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.ID_WIDTH" xilinx:valueSource="auto"/>
+            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_RRESP" xilinx:valueSource="auto"/>
-            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.INSERT_VIP" xilinx:valueSource="user"/>
+            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.HAS_WSTRB" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.PROTOCOL" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.WUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.ADDR_WIDTH" xilinx:valueSource="auto"/>
@@ -2787,14 +2641,9 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.HAS_RRESP" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.HAS_WSTRB" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.ID_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.INSERT_VIP" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.PROTOCOL" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.RUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI_CTRL.WUSER_WIDTH" xilinx:valueSource="constant"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.BOARD_MIG_PARAM" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.MIG_DONT_TOUCH_PARAM" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.RESET_BOARD_INTERFACE" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.XML_INPUT_FILE" xilinx:valueSource="user"/>
          </xilinx:configElementInfos>
        </xilinx:componentInstanceExtensions>
      </spirit:vendorExtensions>
--- a/ddr_general_design.srcs/sources_1/ip/fifo_ddr_wdara/fifo_ddr_wdara.xci
+++ b/ddr_general_design.srcs/sources_1/ip/fifo_ddr_wdara/fifo_ddr_wdara.xci
@@ -6,7 +6,7 @@
  <spirit:version>1.0</spirit:version>
  <spirit:componentInstances>
    <spirit:componentInstance>
-      <spirit:instanceName>fifo_ddr_wdara</spirit:instanceName>
+      <spirit:instanceName>fifo_ddr_data</spirit:instanceName>
      <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="fifo_generator" spirit:version="13.2"/>
      <spirit:configurableElementValues>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CORE_CLK.ASSOCIATED_BUSIF"/>
@@ -152,9 +152,9 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_AXI_WUSER_WIDTH">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_COMMON_CLOCK">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_COUNT_TYPE">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DATA_COUNT_WIDTH">10</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DATA_COUNT_WIDTH">6</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DEFAULT_VALUE">BlankString</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DIN_WIDTH">18</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DIN_WIDTH">512</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DIN_WIDTH_AXIS">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DIN_WIDTH_RACH">32</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DIN_WIDTH_RDCH">64</spirit:configurableElementValue>
@@ -162,7 +162,7 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DIN_WIDTH_WDCH">64</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DIN_WIDTH_WRCH">2</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DOUT_RST_VAL">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DOUT_WIDTH">18</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_DOUT_WIDTH">512</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ENABLE_RLOCS">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_ENABLE_RST_SYNC">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_EN_SAFETY_CKT">0</spirit:configurableElementValue>
@@ -217,8 +217,8 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_SLAVE_CE">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_SRST">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_UNDERFLOW">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_VALID">0</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_VALID">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_WR_ACK">0</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_WR_ACK">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_WR_DATA_COUNT">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_WR_RST">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_IMPLEMENTATION_TYPE">0</spirit:configurableElementValue>
@@ -238,7 +238,7 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_POWER_SAVING_MODE">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRELOAD_LATENCY">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRELOAD_REGS">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_FIFO_TYPE">1kx18</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_FIFO_TYPE">512x72</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_FIFO_TYPE_AXIS">1kx18</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_FIFO_TYPE_RACH">512x36</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PRIM_FIFO_TYPE_RDCH">1kx36</spirit:configurableElementValue>
@@ -260,14 +260,14 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_EMPTY_TYPE_WACH">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_EMPTY_TYPE_WDCH">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_EMPTY_TYPE_WRCH">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_THRESH_ASSERT_VAL">1022</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_THRESH_ASSERT_VAL">62</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_THRESH_ASSERT_VAL_AXIS">1023</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_THRESH_ASSERT_VAL_RACH">1023</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_THRESH_ASSERT_VAL_RDCH">1023</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_THRESH_ASSERT_VAL_WACH">1023</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_THRESH_ASSERT_VAL_WDCH">1023</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_THRESH_ASSERT_VAL_WRCH">1023</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_THRESH_NEGATE_VAL">1021</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_THRESH_NEGATE_VAL">61</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_TYPE">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_TYPE_AXIS">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_TYPE_RACH">0</spirit:configurableElementValue>
@@ -277,10 +277,10 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_PROG_FULL_TYPE_WRCH">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RACH_TYPE">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RDCH_TYPE">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RD_DATA_COUNT_WIDTH">10</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RD_DATA_COUNT_WIDTH">6</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RD_DEPTH">1024</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RD_DEPTH">64</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RD_FREQ">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RD_PNTR_WIDTH">10</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_RD_PNTR_WIDTH">6</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_REG_SLICE_MODE_AXIS">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_REG_SLICE_MODE_RACH">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_REG_SLICE_MODE_RDCH">0</spirit:configurableElementValue>
@@ -310,8 +310,8 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WDCH_TYPE">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WRCH_TYPE">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_ACK_LOW">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_DATA_COUNT_WIDTH">10</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_DATA_COUNT_WIDTH">6</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_DEPTH">1024</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_DEPTH">64</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_DEPTH_AXIS">1024</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_DEPTH_RACH">16</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_DEPTH_RDCH">1024</spirit:configurableElementValue>
@@ -319,7 +319,7 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_DEPTH_WDCH">1024</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_DEPTH_WRCH">16</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_FREQ">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_PNTR_WIDTH">10</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_PNTR_WIDTH">6</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_PNTR_WIDTH_AXIS">10</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_PNTR_WIDTH_RACH">4</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_WR_PNTR_WIDTH_RDCH">10</spirit:configurableElementValue>
@@ -337,10 +337,10 @@
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_SELECT_XPM">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Clock_Enable_Type">Slave_Interface_Clock_Enable</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Clock_Type_AXI">Common_Clock</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">fifo_ddr_wdara</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">fifo_ddr_data</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DATA_WIDTH">64</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Data_Count">false</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Data_Count_Width">10</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Data_Count_Width">6</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Disable_Timing_Violations">false</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Disable_Timing_Violations_AXI">false</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Dout_Reset_Value">0</spirit:configurableElementValue>
@@ -386,14 +386,14 @@
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.FIFO_Implementation_wrch">Common_Clock_Block_RAM</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Fifo_Implementation">Common_Clock_Block_RAM</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Flags_Reset_Value">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Assert_Value">1022</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Assert_Value">62</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Assert_Value_axis">1023</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Assert_Value_rach">1023</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Assert_Value_rdch">1023</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Assert_Value_wach">1023</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Assert_Value_wdch">1023</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Assert_Value_wrch">1023</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Negate_Value">1021</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Full_Threshold_Negate_Value">61</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.HAS_ACLKEN">false</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.HAS_TKEEP">false</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.HAS_TSTRB">false</spirit:configurableElementValue>
@@ -413,8 +413,8 @@
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Inject_Sbit_Error_wach">false</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Inject_Sbit_Error_wdch">false</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Inject_Sbit_Error_wrch">false</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Input_Data_Width">18</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Input_Data_Width">512</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Input_Depth">1024</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Input_Depth">64</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Input_Depth_axis">1024</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Input_Depth_rach">16</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Input_Depth_rdch">1024</spirit:configurableElementValue>
@@ -422,8 +422,8 @@
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Input_Depth_wdch">1024</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Input_Depth_wrch">16</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Master_interface_Clock_enable_memory_mapped">false</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Output_Data_Width">18</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Output_Data_Width">512</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Output_Depth">1024</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Output_Depth">64</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Output_Register_Type">Embedded_Reg</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Overflow_Flag">false</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Overflow_Flag_AXI">false</spirit:configurableElementValue>
@@ -449,7 +449,7 @@
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.RUSER_Width">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Read_Clock_Frequency">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Read_Data_Count">false</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Read_Data_Count_Width">10</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Read_Data_Count_Width">6</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Register_Slice_Mode_axis">Fully_Registered</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Register_Slice_Mode_rach">Fully_Registered</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Register_Slice_Mode_rdch">Fully_Registered</spirit:configurableElementValue>
@@ -473,14 +473,14 @@
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Use_Embedded_Registers">false</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Use_Embedded_Registers_axis">false</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Use_Extra_Logic">false</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Valid_Flag">false</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Valid_Flag">true</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Valid_Sense">Active_High</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.WUSER_Width">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Write_Acknowledge_Flag">false</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Write_Acknowledge_Flag">true</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Write_Acknowledge_Sense">Active_High</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Write_Clock_Frequency">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Write_Data_Count">false</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Write_Data_Count_Width">10</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Write_Data_Count_Width">6</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.asymmetric_port_width">false</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.axis_type">FIFO</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.dynamic_power_saving">false</spirit:configurableElementValue>
@@ -548,6 +548,17 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.PROTOCOL" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXIS.HAS_TREADY" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXIS.TDATA_NUM_BYTES" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Data_Count_Width" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Full_Threshold_Assert_Value" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Full_Threshold_Negate_Value" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Input_Data_Width" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Input_Depth" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Output_Data_Width" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Output_Depth" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Read_Data_Count_Width" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Valid_Flag" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Write_Acknowledge_Flag" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Write_Data_Count_Width" xilinx:valueSource="user"/>
          </xilinx:configElementInfos>
        </xilinx:componentInstanceExtensions>
      </spirit:vendorExtensions>
--- a/ddr_general_design.srcs/sources_1/ip/fifo_ddr_rdata/fifo_ddr_rdata.xci
+++ b/ddr_general_design.srcs/sources_1/ip/fifo_ddr_rdata/fifo_ddr_rdata.xci
@@ -6,7 +6,7 @@
  <spirit:version>1.0</spirit:version>
  <spirit:componentInstances>
    <spirit:componentInstance>
-      <spirit:instanceName>fifo_ddr_rdata</spirit:instanceName>
+      <spirit:instanceName>fifo_ddr_info</spirit:instanceName>
      <spirit:componentRef spirit:vendor="xilinx.com" spirit:library="ip" spirit:name="fifo_generator" spirit:version="13.2"/>
      <spirit:configurableElementValues>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CORE_CLK.ASSOCIATED_BUSIF"/>
@@ -217,8 +217,8 @@
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_SLAVE_CE">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_SRST">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_UNDERFLOW">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_VALID">0</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_VALID">1</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_WR_ACK">0</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_WR_ACK">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_WR_DATA_COUNT">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_HAS_WR_RST">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="MODELPARAM_VALUE.C_IMPLEMENTATION_TYPE">0</spirit:configurableElementValue>
@@ -337,7 +337,7 @@
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.C_SELECT_XPM">0</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Clock_Enable_Type">Slave_Interface_Clock_Enable</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Clock_Type_AXI">Common_Clock</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">fifo_ddr_rdata</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Component_Name">fifo_ddr_info</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.DATA_WIDTH">64</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Data_Count">false</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Data_Count_Width">10</spirit:configurableElementValue>
@@ -473,10 +473,10 @@
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Use_Embedded_Registers">false</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Use_Embedded_Registers_axis">false</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Use_Extra_Logic">false</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Valid_Flag">false</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Valid_Flag">true</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Valid_Sense">Active_High</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.WUSER_Width">0</spirit:configurableElementValue>
-        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Write_Acknowledge_Flag">false</spirit:configurableElementValue>
+        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Write_Acknowledge_Flag">true</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Write_Acknowledge_Sense">Active_High</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Write_Clock_Frequency">1</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="PARAM_VALUE.Write_Data_Count">false</spirit:configurableElementValue>
@@ -548,6 +548,8 @@
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXI.PROTOCOL" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXIS.HAS_TREADY" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="BUSIFPARAM_VALUE.S_AXIS.TDATA_NUM_BYTES" xilinx:valueSource="auto"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Valid_Flag" xilinx:valueSource="user"/>
            <xilinx:configElementInfo xilinx:referenceId="PARAM_VALUE.Write_Acknowledge_Flag" xilinx:valueSource="user"/>
          </xilinx:configElementInfos>
        </xilinx:componentInstanceExtensions>
      </spirit:vendorExtensions>
--- a/ddr_general_design.srcs/sources_1/new/axi2fifo_convert.v
+++ b/ddr_general_design.srcs/sources_1/new/axi2fifo_convert.v
@@ -0,0 +1,26 @@
 `timescale 1ns / 1ps
 //////////////////////////////////////////////////////////////////////////////////
 // Company: 
 // Engineer: 
 // 
 // Create Date: 2025/03/19 10:32:12
 // Design Name: 
 // Module Name: axi2fifo_convert
 // Project Name: 
 // Target Devices: 
 // Tool Versions: 
 // Description: 
 // 
 // Dependencies: 
 // 
 // Revision:
 // Revision 0.01 - File Created
 // Additional Comments:
 // 
 //////////////////////////////////////////////////////////////////////////////////
 module axi2fifo_convert(
    );
 endmodule
--- a/ddr_general_design.srcs/sources_1/new/ddr_axi_rd.v
+++ b/ddr_general_design.srcs/sources_1/new/ddr_axi_rd.v
@@ -21,36 +21,36 @@
 module ddr_axi_rd(
-    input           ARESETN,        //axi复位
+    input           aresetn,        //axi复位
-    input           ACLK,           //axi时钟
+    input           aclk,           //axi时钟
    //axi读通道写地址
-    output [3:0]  M_AXI_ARID   ,    //读地址ID，用来标志一组写信号
+    output [3:0]  m_axi_arid   ,    //读地址ID，用来标志一组写信号
-    output [31:0] M_AXI_ARADDR ,    //读地址，给出一次写突发传输的读地址
+    output [31:0] m_axi_araddr ,    //读地址，给出一次写突发传输的读地址
-    output [7:0]  M_AXI_ARLEN  ,    //突发长度，给出突发传输的次数
+    output [7:0]  m_axi_arlen  ,    //突发长度，给出突发传输的次数
-    output [2:0]  M_AXI_ARSIZE ,    //突发大小，给出每次突发传输的字节数
+    output [2:0]  m_axi_arsize ,    //突发大小，给出每次突发传输的字节数
-    output [1:0]  M_AXI_ARBURST,    //突发类型
+    output [1:0]  m_axi_arburst,    //突发类型
-    output [1:0]  M_AXI_ARLOCK ,    //总线锁信号，可提供操作的原子性
+    output [1:0]  m_axi_arlock ,    //总线锁信号，可提供操作的原子性
-    output [3:0]  M_AXI_ARCACHE,    //内存类型，表明一次传输是怎样通过系统的
+    output [3:0]  m_axi_arcache,    //内存类型，表明一次传输是怎样通过系统的
-    output [2:0]  M_AXI_ARPROT ,    //保护类型，表明一次传输的特权级及安全等级
+    output [2:0]  m_axi_arprot ,    //保护类型，表明一次传输的特权级及安全等级
-    output [3:0]  M_AXI_ARQOS  ,    //质量服务QOS
+    output [3:0]  m_axi_arqos  ,    //质量服务QOS
-    output        M_AXI_ARVALID,    //有效信号，表明此通道的地址控制信号有效
+    output        m_axi_arvalid,    //有效信号，表明此通道的地址控制信号有效
-    input         M_AXI_ARREADY,    //表明“从”可以接收地址和对应的控制信号
+    input         m_axi_arready,    //表明“从”可以接收地址和对应的控制信号
    //axi读通道读数据
-    input [3:0]   M_AXI_RID   , //读ID tag
+    input [3:0]   m_axi_rid   , //读ID tag
-    input [63:0]  M_AXI_RDATA , //读数据
+    input [63:0]  m_axi_rdata , //读数据
-    input [1:0]   M_AXI_RRESP , //读响应，表明读传输的状态
+    input [1:0]   m_axi_rresp , //读响应，表明读传输的状态
-    input         M_AXI_RLAST , //表明读突发的最后一次传输
+    input         m_axi_rlast , //表明读突发的最后一次传输
-    input         M_AXI_RVALID, //表明此通道信号有效
+    input         m_axi_rvalid, //表明此通道信号有效
-    output        M_AXI_RREADY, //表明主机能够接收读数据和响应信息
+    output        m_axi_rready, //表明主机能够接收读数据和响应信息
    //用户端fifo接口    
-    input         RD_START    , //读突发触发信号
+    input         rd_start    , //读突发触发信号
-    input [31:0]  RD_ADRS     , //地址  
+    input [31:0]  rd_adrs     , //地址  
-    input [9:0]   RD_LEN      , //长度
+    input [9:0]   rd_len      , //长度
-    output        RD_READY    , //读空闲
+    output        rd_ready    , //读空闲
-    output        RD_FIFO_WE  , //连接到读fifo的写使能
+    output        rd_fifo_we  , //连接到读fifo的写使能
-    output [63:0] RD_FIFO_DATA, //连接到读fifo的写数据
+    output [63:0] rd_fifo_data, //连接到读fifo的写数据
-    output        RD_DONE       //完成一次突发
+    output        rd_done       //完成一次突发
 );
 //********************************************************************//
@@ -74,25 +74,25 @@ reg         reg_arvalid; //地址有效寄存器
 //***************************** Main Code ****************************//
 //********************************************************************//
-assign RD_DONE = (rd_state == S_RD_DONE) ;
+assign rd_done = (rd_state == S_RD_DONE) ;
-assign M_AXI_ARID         = 4'b1111;//地址id
+assign m_axi_arid         = 4'b1111;//地址id
-assign M_AXI_ARADDR[31:0] = reg_rd_adrs[31:0];//地址
+assign m_axi_araddr[31:0] = reg_rd_adrs[31:0];//地址
-assign M_AXI_ARLEN[7:0]   = RD_LEN-32'd1;//突发长度
+assign m_axi_arlen[7:0]   = rd_len-32'd1;//突发长度
-assign M_AXI_ARSIZE[2:0]  = 3'b011;//表示AXI总线每个数据宽度是8字节，64位
+assign m_axi_arsize[2:0]  = 3'b011;//表示AXI总线每个数据宽度是8字节，64位
-assign M_AXI_ARBURST[1:0] = 2'b01;//地址递增方式传输
+assign m_axi_arburst[1:0] = 2'b01;//地址递增方式传输
-assign M_AXI_ARLOCK       = 1'b0;
+assign m_axi_arlock       = 1'b0;
-assign M_AXI_ARCACHE[3:0] = 4'b0000;
+assign m_axi_arcache[3:0] = 4'b0000;
-assign M_AXI_ARPROT[2:0]  = 3'b000;
+assign m_axi_arprot[2:0]  = 3'b000;
-assign M_AXI_ARQOS[3:0]   = 4'b0000;
+assign m_axi_arqos[3:0]   = 4'b0000;
-assign M_AXI_ARVALID      = reg_arvalid;
+assign m_axi_arvalid      = reg_arvalid;
-assign M_AXI_RREADY       = M_AXI_RVALID;
+assign m_axi_rready       = m_axi_rvalid;
-assign RD_READY           = (rd_state == S_RD_IDLE)?1'b1:1'b0;//读空闲
+assign rd_ready           = (rd_state == S_RD_IDLE)?1'b1:1'b0;//读空闲
-assign RD_FIFO_WE         = M_AXI_RVALID;//读fifo的写使能信号
+assign rd_fifo_we         = m_axi_rvalid;//读fifo的写使能信号
-assign RD_FIFO_DATA[63:0] = M_AXI_RDATA[63:0];//读fifo的写数据信号 
+assign rd_fifo_data[63:0] = m_axi_rdata[63:0];//读fifo的写数据信号 
  // 读状态机
-  always @(posedge ACLK or negedge ARESETN) begin
+  always @(posedge aclk or negedge aresetn) begin
-    if(!ARESETN) begin
+    if(!aresetn) begin
      rd_state          <= S_RD_IDLE;
      reg_rd_adrs[31:0] <= 32'd0;
      reg_rd_len[31:0]  <= 32'd0;
@@ -100,10 +100,10 @@ assign RD_FIFO_DATA[63:0] = M_AXI_RDATA[63:0];//读fifo的写数据信号
    end else begin
      case(rd_state)
        S_RD_IDLE: begin//读空闲
-          if(RD_START) begin//突发触发信号
+          if(rd_start) begin//突发触发信号
            rd_state          <= S_RA_WAIT;
-            reg_rd_adrs[31:0] <= RD_ADRS[31:0];
+            reg_rd_adrs[31:0] <= rd_adrs[31:0];
-            reg_rd_len[31:0]  <= RD_LEN[9:0] -32'd1;
+            reg_rd_len[31:0]  <= rd_len[9:0] -32'd1;
          end
          reg_arvalid     <= 1'b0;
        end
@@ -115,14 +115,14 @@ assign RD_FIFO_DATA[63:0] = M_AXI_RDATA[63:0];//读fifo的写数据信号
          reg_arvalid       <= 1'b1;//拉高地址有效
        end
        S_RD_WAIT: begin //读取数据等待
-          if(M_AXI_ARREADY) begin
+          if(m_axi_arready) begin
            rd_state        <= S_RD_PROC;
            reg_arvalid     <= 1'b0;//握手成功就拉低
          end
        end
        S_RD_PROC: begin //接受循环
-          if(M_AXI_RVALID) begin //收到数据有效，握手成功
+          if(m_axi_rvalid) begin //收到数据有效，握手成功
-            if(M_AXI_RLAST) begin //收到最后一个数据
+            if(m_axi_rlast) begin //收到最后一个数据
                rd_state<= S_RD_DONE;
            end
          end
--- a/ddr_general_design.srcs/sources_1/new/ddr_axi_wr.v
+++ b/ddr_general_design.srcs/sources_1/new/ddr_axi_wr.v
@@ -21,39 +21,39 @@
 module ddr_axi_wr(
-  input           ARESETN    , //axi复位
+  input           aresetn    , //axi复位
-  input           ACLK       , //axi总时钟
+  input           aclk       , //axi总时钟
 //axi4写通道地址通道
-  output [3:0]  M_AXI_AWID   , //写地址ID，用来标志一组写信号
+  output [3:0]  m_axi_awid   , //写地址ID，用来标志一组写信号
-  output [31:0] M_AXI_AWADDR , //写地址，给出一次写突发传输的写地址
+  output [31:0] m_axi_awaddr , //写地址，给出一次写突发传输的写地址
-  output [7:0]  M_AXI_AWLEN  , //突发长度，给出突发传输的次数  
+  output [7:0]  m_axi_awlen  , //突发长度，给出突发传输的次数  
-  output [2:0]  M_AXI_AWSIZE , //突发大小，给出每次突发传输的字节数  
+  output [2:0]  m_axi_awsize , //突发大小，给出每次突发传输的字节数  
-  output [1:0]  M_AXI_AWBURST, //突发类型  
+  output [1:0]  m_axi_awburst, //突发类型  
-  output        M_AXI_AWLOCK , //总线锁信号，可提供操作的原子性  
+  output        m_axi_awlock , //总线锁信号，可提供操作的原子性  
-  output [3:0]  M_AXI_AWCACHE, //内存类型，表明一次传输是怎样通过系统的  
+  output [3:0]  m_axi_awcache, //内存类型，表明一次传输是怎样通过系统的  
-  output [2:0]  M_AXI_AWPROT , //保护类型，表明一次传输的特权级及安全等级  
+  output [2:0]  m_axi_awprot , //保护类型，表明一次传输的特权级及安全等级  
-  output [3:0]  M_AXI_AWQOS  , //质量服务QoS     
+  output [3:0]  m_axi_awqos  , //质量服务QoS     
-  output        M_AXI_AWVALID, //有效信号，表明此通道的地址控制信号有效
+  output        m_axi_awvalid, //有效信号，表明此通道的地址控制信号有效
-  input         M_AXI_AWREADY, //表明“从”可以接收地址和对应的控制信号
+  input         m_axi_awready, //表明“从”可以接收地址和对应的控制信号
 //axi4写通道数据通道
-  output [63:0] M_AXI_WDATA  , //写数据
+  output [63:0] m_axi_wdata  , //写数据
-  output [7:0]  M_AXI_WSTRB  , //写数据有效的字节线
+  output [7:0]  m_axi_wstrb  , //写数据有效的字节线
-  output        M_AXI_WLAST  , //表明此次传输是最后一个突发传输
+  output        m_axi_wlast  , //表明此次传输是最后一个突发传输
-  output        M_AXI_WVALID , //写有效，表明此次写有效
+  output        m_axi_wvalid , //写有效，表明此次写有效
-  input         M_AXI_WREADY , //表明从机可以接收写数据
+  input         m_axi_wready , //表明从机可以接收写数据
 //axi4写通道应答通道
-  input [3:0]   M_AXI_BID    , //写响应ID TAG
+  input [3:0]   m_axi_bid    , //写响应ID TAG
-  input [1:0]   M_AXI_BRESP  , //写响应，表明写传输的状态
+  input [1:0]   m_axi_bresp  , //写响应，表明写传输的状态
-  input         M_AXI_BVALID , //写响应有效
+  input         m_axi_bvalid , //写响应有效
-  output        M_AXI_BREADY , //表明主机能够接收写响应
+  output        m_axi_bready , //表明主机能够接收写响应
  //用户端信号
-  input         WR_START     , //写突发触发信号
+  input         wr_start     , //写突发触发信号
-  input [31:0]  WR_ADRS      , //地址  
+  input [31:0]  wr_adrs      , //地址  
-  input [9:0]   WR_LEN       , //长度
+  input [9:0]   wr_len       , //长度
-  output        WR_READY     , //写空闲
+  output        wr_ready     , //写空闲
-  output        WR_FIFO_RE   , //连接到写fifo的读使能
+  output        wr_fifo_re   , //连接到写fifo的读使能
-  input [63:0]  WR_FIFO_DATA , //连接到fifo的读数据
+  input [63:0]  wr_fifo_data , //连接到fifo的读数据
-  output        WR_DONE        //完成一次突发
+  output        wr_done        //完成一次突发
 );
 //********************************************************************//
@@ -80,40 +80,40 @@ reg [7:0]   reg_w_len  ; //突发长度最大256，实测128最佳
 //********************************************************************//
 //写完成信号的写状态完成
-assign WR_DONE = (wr_state == S_WR_DONE);
+assign wr_done = (wr_state == S_WR_DONE);
 //写fifo的读使能为axi数据握手成功
-assign WR_FIFO_RE         = ((reg_wvalid & M_AXI_WREADY ));
+assign wr_fifo_re         = ((reg_wvalid & m_axi_wready ));
 //只有一个主机，可随意设置
-assign M_AXI_AWID         = 4'b1111;
+assign m_axi_awid         = 4'b1111;
 //把地址赋予总线
-assign M_AXI_AWADDR[31:0] = reg_wr_adrs[31:0];
+assign m_axi_awaddr[31:0] = reg_wr_adrs[31:0];
 //一次突发传输1长度
-assign M_AXI_AWLEN[7:0]   = WR_LEN-'d1;
+assign m_axi_awlen[7:0]   = wr_len-'d1;
 //表示AXI总线每个数据宽度是8字节，64位
-assign M_AXI_AWSIZE[2:0]  = 3'b011;
+assign m_axi_awsize[2:0]  = 3'b011;
 //01代表地址递增，10代表递减
-assign M_AXI_AWBURST[1:0] = 2'b01; 
+assign m_axi_awburst[1:0] = 2'b01; 
-assign M_AXI_AWLOCK       = 1'b0;
+assign m_axi_awlock       = 1'b0;
-assign M_AXI_AWCACHE[3:0] = 4'b0000;
+assign m_axi_awcache[3:0] = 4'b0000;
-assign M_AXI_AWPROT[2:0]  = 3'b000;
+assign m_axi_awprot[2:0]  = 3'b000;
-assign M_AXI_AWQOS[3:0]   = 4'b0000;
+assign m_axi_awqos[3:0]   = 4'b0000;
 //地址握手信号AWVALID
-assign M_AXI_AWVALID      = reg_awvalid;
+assign m_axi_awvalid      = reg_awvalid;
 //fifo数据赋予总线
-assign M_AXI_WDATA[63:0]  = WR_FIFO_DATA[63:0];
+assign m_axi_wdata[63:0]  = wr_fifo_data[63:0];
-assign M_AXI_WSTRB[7:0]   = 8'hFF;
+assign m_axi_wstrb[7:0]   = 8'hFF;
 //写到最后一个数据
-assign M_AXI_WLAST        =(reg_w_len[7:0] == 8'd0)?'b1:'b0;
+assign m_axi_wlast        =(reg_w_len[7:0] == 8'd0)?'b1:'b0;
 //数据握手信号WVALID
-assign M_AXI_WVALID       = reg_wvalid;
+assign m_axi_wvalid       = reg_wvalid;
 //这个信号是告诉AXI我收到你的应答
-assign M_AXI_BREADY       = M_AXI_BVALID;
+assign m_axi_bready       = m_axi_bvalid;
 //axi状态机空闲信号
-assign WR_READY           = (wr_state == S_WR_IDLE)?1'b1:1'b0;
+assign wr_ready           = (wr_state == S_WR_IDLE)?1'b1:1'b0;
 //axi写过程状态机
-  always @(posedge ACLK or negedge ARESETN) begin
+  always @(posedge aclk or negedge aresetn) begin
-    if(!ARESETN) begin
+    if(!aresetn) begin
      wr_state            <= S_WR_IDLE;
      reg_wr_adrs[31:0]   <= 32'd0;
      reg_awvalid         <= 1'b0;
@@ -124,9 +124,9 @@ assign WR_READY           = (wr_state == S_WR_IDLE)?1'b1:1'b0;
  end else begin
      case(wr_state)
        S_WR_IDLE: begin //写空闲
-          if(WR_START) begin //触发写过程
+          if(wr_start) begin //触发写过程
            wr_state          <= S_WA_WAIT;
-            reg_wr_adrs[31:0] <= WR_ADRS[31:0];
+            reg_wr_adrs[31:0] <= wr_adrs[31:0];
          end
          reg_awvalid         <= 1'b0;
          reg_wvalid          <= 1'b0;
@@ -141,14 +141,14 @@ assign WR_READY           = (wr_state == S_WR_IDLE)?1'b1:1'b0;
          reg_wvalid      <= 1'b1;//拉高数据有效信号
        end
        S_WD_WAIT: begin
-          if(M_AXI_AWREADY) begin//等待写地址就绪
+          if(m_axi_awready) begin//等待写地址就绪
            wr_state        <= S_WD_PROC;
-            reg_w_len<=WR_LEN-'d1;//127代表128个长度，0代表1个长度
+            reg_w_len<=wr_len-'d1;//127代表128个长度，0代表1个长度
            reg_awvalid     <= 1'b0;
          end
        end
        S_WD_PROC: begin//等待AXI写数据就绪信号
-          if(M_AXI_WREADY) begin//拉高了就可以输出fifo使能信号开始读
+          if(m_axi_wready) begin//拉高了就可以输出fifo使能信号开始读
            if(reg_w_len[7:0] == 8'd0) begin//完成数据写过程
              wr_state        <= S_WR_WAIT;
@@ -165,7 +165,7 @@ assign WR_READY           = (wr_state == S_WR_IDLE)?1'b1:1'b0;
        S_WR_WAIT: begin//等待写的AXI应答信号
          reg_w_last<='b0;
          //M_AXI_BVALID拉高表示写成功，然后状态机完成一次突发传输
-          if(M_AXI_BVALID) begin
+          if(m_axi_bvalid) begin
              wr_state          <= S_WR_DONE;
          end
        end
--- a/ddr_general_design.srcs/sources_1/new/ddr_ctrl_top.v
+++ b/ddr_general_design.srcs/sources_1/new/ddr_ctrl_top.v
@@ -20,7 +20,7 @@
 //////////////////////////////////////////////////////////////////////////////////
-module ddr_ctrl(
+module ddr_ctrl_top(
    // Inouts
   inout [63:0]                         ddr3_dq,
   inout [7:0]                          ddr3_dqs_n,
@@ -39,13 +39,9 @@ module ddr_ctrl(
   output [7:0]                         ddr3_dm,
   output [1:0]                         ddr3_odt,
   // Inputs
   // Single-ended system clock
   input                                sys_clk_i,
   output                               tg_compare_error,
   output                               init_calib_complete,
   // System reset - Default polarity of sys_rst pin is Active Low.
   // System reset polarity will change based on the option 
   // selected in GUI.
   input                                sys_rst
    );
@@ -110,110 +106,114 @@ module ddr_ctrl(
       wire                              s_axi_rlast;
       wire                              s_axi_rvalid;
 fifo_axi_ctrl fifo_axi_ctrl_inst(
-// output declaration of module ddr_axi_rd
+);
-wire [3:0] M_AXI_ARID;
+
-wire [31:0] M_AXI_ARADDR;
+
-wire [7:0] M_AXI_ARLEN;
+// Output declaration of module ddr_axi_rd
-wire [2:0] M_AXI_ARSIZE;
+       wire [3:0]                        m_axi_arid;
-wire [1:0] M_AXI_ARBURST;
+       wire [31:0]                       m_axi_araddr;
-wire [1:0] M_AXI_ARLOCK;
+       wire [7:0]                        m_axi_arlen;
-wire [3:0] M_AXI_ARCACHE;
+       wire [2:0]                        m_axi_arsize;
-wire [2:0] M_AXI_ARPROT;
+       wire [1:0]                        m_axi_arburst;
-wire [3:0] M_AXI_ARQOS;
+       wire [1:0]                        m_axi_arlock;
-wire M_AXI_ARVALID;
+       wire [3:0]                        m_axi_arcache;
-wire M_AXI_RREADY;
+       wire [2:0]                        m_axi_arprot;
-wire RD_READY;
+       wire [3:0]                        m_axi_arqos;
-wire RD_FIFO_WE;
+       wire                              m_axi_arvalid;
-wire [63:0] RD_FIFO_DATA;
+       wire                              m_axi_rready;
-wire RD_DONE;
+       wire                              rd_ready;
       wire                              rd_fifo_we;
       wire [63:0]                       rd_fifo_data;
       wire                              rd_done;
 ddr_axi_rd u_ddr_axi_rd(
-       .ARESETN       	(ARESETN        ),
+       .aresetn        (aresetn       ),
-       .ACLK          	(ACLK           ),
+       .aclk           (aclk          ),
-       .M_AXI_ARID    	(M_AXI_ARID     ),
+       .m_axi_arid     (m_axi_arid    ),
-       .M_AXI_ARADDR  	(M_AXI_ARADDR   ),
+       .m_axi_araddr   (m_axi_araddr  ),
-       .M_AXI_ARLEN   	(M_AXI_ARLEN    ),
+       .m_axi_arlen    (m_axi_arlen   ),
-       .M_AXI_ARSIZE  	(M_AXI_ARSIZE   ),
+       .m_axi_arsize   (m_axi_arsize  ),
-       .M_AXI_ARBURST 	(M_AXI_ARBURST  ),
+       .m_axi_arburst  (m_axi_arburst ),
-       .M_AXI_ARLOCK  	(M_AXI_ARLOCK   ),
+       .m_axi_arlock   (m_axi_arlock  ),
-       .M_AXI_ARCACHE 	(M_AXI_ARCACHE  ),
+       .m_axi_arcache  (m_axi_arcache ),
-       .M_AXI_ARPROT  	(M_AXI_ARPROT   ),
+       .m_axi_arprot   (m_axi_arprot  ),
-       .M_AXI_ARQOS   	(M_AXI_ARQOS    ),
+       .m_axi_arqos    (m_axi_arqos   ),
-       .M_AXI_ARVALID 	(M_AXI_ARVALID  ),
+       .m_axi_arvalid  (m_axi_arvalid ),
-       .M_AXI_ARREADY 	(M_AXI_ARREADY  ),
+       .m_axi_arready  (m_axi_arready ),
-       .M_AXI_RID     	(M_AXI_RID      ),
+       .m_axi_rid      (m_axi_rid     ),
-       .M_AXI_RDATA   	(M_AXI_RDATA    ),
+       .m_axi_rdata    (m_axi_rdata   ),
-       .M_AXI_RRESP   	(M_AXI_RRESP    ),
+       .m_axi_rresp    (m_axi_rresp   ),
-       .M_AXI_RLAST   	(M_AXI_RLAST    ),
+       .m_axi_rlast    (m_axi_rlast   ),
-       .M_AXI_RVALID  	(M_AXI_RVALID   ),
+       .m_axi_rvalid   (m_axi_rvalid  ),
-       .M_AXI_RREADY  	(M_AXI_RREADY   ),
+       .m_axi_rready   (m_axi_rready  ),
-       .RD_START      	(RD_START       ),
+       .rd_start       (rd_start      ),
-       .RD_ADRS       	(RD_ADRS        ),
+       .rd_adrs        (rd_adrs       ),
-       .RD_LEN        	(RD_LEN         ),
+       .rd_len         (rd_len        ),
-       .RD_READY      	(RD_READY       ),
+       .rd_ready       (rd_ready      ),
-       .RD_FIFO_WE    	(RD_FIFO_WE     ),
+       .rd_fifo_we     (rd_fifo_we    ),
-       .RD_FIFO_DATA  	(RD_FIFO_DATA   ),
+       .rd_fifo_data   (rd_fifo_data  ),
-       .RD_DONE       	(RD_DONE        )
+       .rd_done        (rd_done       )
 );
-// output declaration of module ddr_axi_wr
+// Output declaration of module ddr_axi_wr
-wire [3:0] M_AXI_AWID;
+       wire [3:0]                        m_axi_awid;
-wire [31:0] M_AXI_AWADDR;
+       wire [31:0]                       m_axi_awaddr;
-wire [7:0] M_AXI_AWLEN;
+       wire [7:0]                        m_axi_awlen;
-wire [2:0] M_AXI_AWSIZE;
+       wire [2:0]                        m_axi_awsize;
-wire [1:0] M_AXI_AWBURST;
+       wire [1:0]                        m_axi_awburst;
-wire M_AXI_AWLOCK;
+       wire                              m_axi_awlock;
-wire [3:0] M_AXI_AWCACHE;
+       wire [3:0]                        m_axi_awcache;
-wire [2:0] M_AXI_AWPROT;
+       wire [2:0]                        m_axi_awprot;
-wire [3:0] M_AXI_AWQOS;
+       wire [3:0]                        m_axi_awqos;
-wire M_AXI_AWVALID;
+       wire                              m_axi_awvalid;
-wire [63:0] M_AXI_WDATA;
+       wire [63:0]                       m_axi_wdata;
-wire [7:0] M_AXI_WSTRB;
+       wire [7:0]                        m_axi_wstrb;
-wire M_AXI_WLAST;
+       wire                              m_axi_wlast;
-wire M_AXI_WVALID;
+       wire                              m_axi_wvalid;
-wire M_AXI_BREADY;
+       wire                              m_axi_bready;
-wire WR_READY;
+       wire                              wr_ready;
-wire WR_FIFO_RE;
+       wire                              wr_fifo_re;
-wire WR_DONE;
+       wire                              wr_done;
 ddr_axi_wr u_ddr_axi_wr(
-       .ARESETN       	(ARESETN        ),
+       .aresetn        (aresetn       ),
-       .ACLK          	(ACLK           ),
+       .aclk           (aclk          ),
-       .M_AXI_AWID    	(M_AXI_AWID     ),
+       .m_axi_awid     (m_axi_awid    ),
-       .M_AXI_AWADDR  	(M_AXI_AWADDR   ),
+       .m_axi_awaddr   (m_axi_awaddr  ),
-       .M_AXI_AWLEN   	(M_AXI_AWLEN    ),
+       .m_axi_awlen    (m_axi_awlen   ),
-       .M_AXI_AWSIZE  	(M_AXI_AWSIZE   ),
+       .m_axi_awsize   (m_axi_awsize  ),
-       .M_AXI_AWBURST 	(M_AXI_AWBURST  ),
+       .m_axi_awburst  (m_axi_awburst ),
-       .M_AXI_AWLOCK  	(M_AXI_AWLOCK   ),
+       .m_axi_awlock   (m_axi_awlock  ),
-       .M_AXI_AWCACHE 	(M_AXI_AWCACHE  ),
+       .m_axi_awcache  (m_axi_awcache ),
-       .M_AXI_AWPROT  	(M_AXI_AWPROT   ),
+       .m_axi_awprot   (m_axi_awprot  ),
-       .M_AXI_AWQOS   	(M_AXI_AWQOS    ),
+       .m_axi_awqos    (m_axi_awqos   ),
-       .M_AXI_AWVALID 	(M_AXI_AWVALID  ),
+       .m_axi_awvalid  (m_axi_awvalid ),
-       .M_AXI_AWREADY 	(M_AXI_AWREADY  ),
+       .m_axi_awready  (m_axi_awready ),
-       .M_AXI_WDATA   	(M_AXI_WDATA    ),
+       .m_axi_wdata    (m_axi_wdata   ),
-       .M_AXI_WSTRB   	(M_AXI_WSTRB    ),
+       .m_axi_wstrb    (m_axi_wstrb   ),
-       .M_AXI_WLAST   	(M_AXI_WLAST    ),
+       .m_axi_wlast    (m_axi_wlast   ),
-       .M_AXI_WVALID  	(M_AXI_WVALID   ),
+       .m_axi_wvalid   (m_axi_wvalid  ),
-       .M_AXI_WREADY  	(M_AXI_WREADY   ),
+       .m_axi_wready   (m_axi_wready  ),
-       .M_AXI_BID     	(M_AXI_BID      ),
+       .m_axi_bid      (m_axi_bid     ),
-       .M_AXI_BRESP   	(M_AXI_BRESP    ),
+       .m_axi_bresp    (m_axi_bresp   ),
-       .M_AXI_BVALID  	(M_AXI_BVALID   ),
+       .m_axi_bvalid   (m_axi_bvalid  ),
-       .M_AXI_BREADY  	(M_AXI_BREADY   ),
+       .m_axi_bready   (m_axi_bready  ),
-       .WR_START      	(WR_START       ),
+       .wr_start       (wr_start      ),
-       .WR_ADRS       	(WR_ADRS        ),
+       .wr_adrs        (wr_adrs       ),
-       .WR_LEN        	(WR_LEN         ),
+       .wr_len         (wr_len        ),
-       .WR_READY      	(WR_READY       ),
+       .wr_ready       (wr_ready      ),
-       .WR_FIFO_RE    	(WR_FIFO_RE     ),
+       .wr_fifo_re     (wr_fifo_re    ),
-       .WR_FIFO_DATA  	(WR_FIFO_DATA   ),
+       .wr_fifo_data   (wr_fifo_data  ),
-       .WR_DONE       	(WR_DONE        )
+       .wr_done        (wr_done       )
 );
-  ddr3_mig u_ddr3_mig(
+ddr_ctrl ddr_ctrl_inst(
 // Memory interface ports
       .ddr3_addr                      (ddr3_addr),
       .ddr3_ba                        (ddr3_ba),
@@ -259,7 +259,6 @@ ddr_axi_wr u_ddr_axi_wr(
       .s_axi_awvalid                  (s_axi_awvalid),
       .s_axi_awready                  (s_axi_awready),
 // Slave Interface Write Data Ports
       .s_axi_wdata                    (s_axi_wdata),
       .s_axi_wstrb                    (s_axi_wstrb),
@@ -267,14 +266,12 @@ ddr_axi_wr u_ddr_axi_wr(
       .s_axi_wvalid                   (s_axi_wvalid),
       .s_axi_wready                   (s_axi_wready),
 // Slave Interface Write Response Ports
       .s_axi_bid                      (s_axi_bid),
       .s_axi_bresp                    (s_axi_bresp),
       .s_axi_bvalid                   (s_axi_bvalid),
       .s_axi_bready                   (s_axi_bready),
 // Slave Interface Read Address Ports
       .s_axi_arid                     (s_axi_arid),
       .s_axi_araddr                   (s_axi_araddr),
@@ -288,7 +285,6 @@ ddr_axi_wr u_ddr_axi_wr(
       .s_axi_arvalid                  (s_axi_arvalid),
       .s_axi_arready                  (s_axi_arready),
 // Slave Interface Read Data Ports
       .s_axi_rid                      (s_axi_rid),
       .s_axi_rdata                    (s_axi_rdata),
--- a/ddr_general_design.srcs/sources_1/new/fifo2axi_convert.v
+++ b/ddr_general_design.srcs/sources_1/new/fifo2axi_convert.v
@@ -0,0 +1,26 @@
 `timescale 1ns / 1ps
 //////////////////////////////////////////////////////////////////////////////////
 // Company: 
 // Engineer: 
 // 
 // Create Date: 2025/03/19 10:25:21
 // Design Name: 
 // Module Name: fifo2axi_convert
 // Project Name: 
 // Target Devices: 
 // Tool Versions: 
 // Description: 
 // 
 // Dependencies: 
 // 
 // Revision:
 // Revision 0.01 - File Created
 // Additional Comments:
 // 
 //////////////////////////////////////////////////////////////////////////////////
 module fifo2axi_convert(
    );
 endmodule
--- a/ddr_general_design.srcs/sources_1/new/fifo_axi_ctrl.v
+++ b/ddr_general_design.srcs/sources_1/new/fifo_axi_ctrl.v
@@ -0,0 +1,58 @@
 `timescale 1ns / 1ps
 //////////////////////////////////////////////////////////////////////////////////
 // Company: 
 // Engineer: 
 // 
 // Create Date: 2025/03/19 10:26:57
 // Design Name: 
 // Module Name: fifo_axi_ctrl
 // Project Name: 
 // Target Devices: 
 // Tool Versions: 
 // Description: 
 // 
 // Dependencies: 
 // 
 // Revision:
 // Revision 0.01 - File Created
 // Additional Comments:
 // 
 //////////////////////////////////////////////////////////////////////////////////
 module fifo_axi_ctrl(
    );
    fifo2axi_convert fifo2axi_convert_inst(
    );
    axi2fifo_convert axi2fifo_convert_inst(
    );
    fifo_ddr_addr fifo_ddr_raddr_inst(
    );
    fifo_ddr_data fifo_ddr_rdata_inst(
    );
    fifo_ddr_addr fifo_ddr_waddr_inst(
    );
    fifo_ddr_data fifo_ddr_wdata_inst(
    );
    fifo_ddr_info fifo_ddr_info_inst(
    );
 endmodule
--- a/ddr_general_design.xpr
+++ b/ddr_general_design.xpr
@@ -3,7 +3,7 @@
 <!--                                                         -->
 <!-- Copyright 1986-2019 Xilinx, Inc. All Rights Reserved.   -->
-<Project Version="7" Minor="44" Path="D:/Project/Vivado/AX7325/ddr3_general_design/ddr_general_design.xpr">
+<Project Version="7" Minor="44" Path="D:/project/Vivado/project/AX7325/ddr_general_design/ddr_general_design.xpr">
  <DefaultLaunch Dir="$PRUNDIR"/>
  <Configuration>
    <Option Name="Id" Val="f70ee986e274458592343b96a4e9c625"/>
@@ -36,13 +36,13 @@
    <Option Name="WTVcsLaunchSim" Val="0"/>
    <Option Name="WTRivieraLaunchSim" Val="0"/>
    <Option Name="WTActivehdlLaunchSim" Val="0"/>
-    <Option Name="WTXSimExportSim" Val="7"/>
+    <Option Name="WTXSimExportSim" Val="9"/>
-    <Option Name="WTModelSimExportSim" Val="7"/>
+    <Option Name="WTModelSimExportSim" Val="9"/>
-    <Option Name="WTQuestaExportSim" Val="7"/>
+    <Option Name="WTQuestaExportSim" Val="9"/>
-    <Option Name="WTIesExportSim" Val="7"/>
+    <Option Name="WTIesExportSim" Val="9"/>
-    <Option Name="WTVcsExportSim" Val="7"/>
+    <Option Name="WTVcsExportSim" Val="9"/>
-    <Option Name="WTRivieraExportSim" Val="7"/>
+    <Option Name="WTRivieraExportSim" Val="9"/>
-    <Option Name="WTActivehdlExportSim" Val="7"/>
+    <Option Name="WTActivehdlExportSim" Val="9"/>
    <Option Name="GenerateIPUpgradeLog" Val="TRUE"/>
    <Option Name="XSimRadix" Val="hex"/>
    <Option Name="XSimTimeUnit" Val="ns"/>
@@ -84,20 +84,6 @@
          <Attr Name="ScopedToCell" Val="pcie_ddr_mig_7series_0_0"/>
        </FileInfo>
      </File>
      <File Path="$PSRCDIR/sources_1/new/ddr_ctrl.v">
        <FileInfo>
          <Attr Name="AutoDisabled" Val="1"/>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PSRCDIR/sources_1/ip/ddr3_mig/mig_a.prj">
        <FileInfo>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="ScopedToCell" Val="ddr3_mig"/>
        </FileInfo>
      </File>
      <File Path="$PSRCDIR/sources_1/new/ddr_axi_wr.v">
        <FileInfo>
          <Attr Name="AutoDisabled" Val="1"/>
@@ -122,6 +108,46 @@
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PSRCDIR/sources_1/new/fifo2axi_convert.v">
        <FileInfo>
          <Attr Name="AutoDisabled" Val="1"/>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PSRCDIR/sources_1/new/fifo_axi_ctrl.v">
        <FileInfo>
          <Attr Name="AutoDisabled" Val="1"/>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PSRCDIR/sources_1/new/axi2fifo_convert.v">
        <FileInfo>
          <Attr Name="AutoDisabled" Val="1"/>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PSRCDIR/sources_1/ip/ddr_ctrl/ddr_ctrl.xci">
        <FileInfo>
          <Attr Name="AutoDisabled" Val="1"/>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <File Path="$PSRCDIR/sources_1/new/ddr_ctrl_top.v">
        <FileInfo>
          <Attr Name="AutoDisabled" Val="1"/>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="DesignMode" Val="RTL"/>
        <Option Name="TopModule" Val="pcie_ddr_wrapper"/>
@@ -153,8 +179,8 @@
        <Option Name="TopAutoSet" Val="TRUE"/>
      </Config>
    </FileSet>
-    <FileSet Name="ddr3_mig" Type="BlockSrcs" RelSrcDir="$PSRCDIR/ddr3_mig">
+    <FileSet Name="fifo_ddr_info" Type="BlockSrcs" RelSrcDir="$PSRCDIR/fifo_ddr_info">
-      <File Path="$PSRCDIR/sources_1/ip/ddr3_mig/ddr3_mig.xci">
+      <File Path="$PSRCDIR/sources_1/ip/fifo_ddr_info/fifo_ddr_info.xci">
        <FileInfo>
          <Attr Name="AutoDisabled" Val="1"/>
          <Attr Name="UsedIn" Val="synthesis"/>
@@ -163,12 +189,12 @@
        </FileInfo>
      </File>
      <Config>
-        <Option Name="TopModule" Val="ddr3_mig"/>
+        <Option Name="TopModule" Val="fifo_ddr_info"/>
        <Option Name="UseBlackboxStub" Val="1"/>
      </Config>
    </FileSet>
-    <FileSet Name="fifo_ddr_wdara" Type="BlockSrcs" RelSrcDir="$PSRCDIR/fifo_ddr_wdara">
+    <FileSet Name="fifo_ddr_data" Type="BlockSrcs" RelSrcDir="$PSRCDIR/fifo_ddr_data">
-      <File Path="$PSRCDIR/sources_1/ip/fifo_ddr_wdara/fifo_ddr_wdara.xci">
+      <File Path="$PSRCDIR/sources_1/ip/fifo_ddr_data/fifo_ddr_data.xci">
        <FileInfo>
          <Attr Name="AutoDisabled" Val="1"/>
          <Attr Name="UsedIn" Val="synthesis"/>
@@ -177,21 +203,7 @@
        </FileInfo>
      </File>
      <Config>
-        <Option Name="TopModule" Val="fifo_ddr_wdara"/>
+        <Option Name="TopModule" Val="fifo_ddr_data"/>
        <Option Name="UseBlackboxStub" Val="1"/>
      </Config>
    </FileSet>
    <FileSet Name="fifo_ddr_rdata" Type="BlockSrcs" RelSrcDir="$PSRCDIR/fifo_ddr_rdata">
      <File Path="$PSRCDIR/sources_1/ip/fifo_ddr_rdata/fifo_ddr_rdata.xci">
        <FileInfo>
          <Attr Name="AutoDisabled" Val="1"/>
          <Attr Name="UsedIn" Val="synthesis"/>
          <Attr Name="UsedIn" Val="implementation"/>
          <Attr Name="UsedIn" Val="simulation"/>
        </FileInfo>
      </File>
      <Config>
        <Option Name="TopModule" Val="fifo_ddr_rdata"/>
        <Option Name="UseBlackboxStub" Val="1"/>
      </Config>
    </FileSet>
@@ -224,17 +236,7 @@
      <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
      <RQSFiles/>
    </Run>
-    <Run Id="ddr3_mig_synth_1" Type="Ft3:Synth" SrcSet="ddr3_mig" Part="xc7k325tffg900-2" ConstrsSet="ddr3_mig" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/ddr3_mig_synth_1" IncludeInArchive="true">
+    <Run Id="fifo_ddr_info_synth_1" Type="Ft3:Synth" SrcSet="fifo_ddr_info" Part="xc7k325tffg900-2" ConstrsSet="fifo_ddr_info" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/fifo_ddr_info_synth_1" IncludeInArchive="true">
      <Strategy Version="1" Minor="2">
        <StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2019"/>
        <Step Id="synth_design"/>
      </Strategy>
      <GeneratedRun Dir="$PRUNDIR" File="gen_run.xml"/>
      <ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2019"/>
      <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
      <RQSFiles/>
    </Run>
    <Run Id="fifo_ddr_wdara_synth_1" Type="Ft3:Synth" SrcSet="fifo_ddr_wdara" Part="xc7k325tffg900-2" ConstrsSet="fifo_ddr_wdara" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/fifo_ddr_wdara_synth_1" IncludeInArchive="true">
      <Strategy Version="1" Minor="2">
        <StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2019">
          <Desc>Vivado Synthesis Defaults</Desc>
@@ -246,7 +248,7 @@
      <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
      <RQSFiles/>
    </Run>
-    <Run Id="fifo_ddr_rdata_synth_1" Type="Ft3:Synth" SrcSet="fifo_ddr_rdata" Part="xc7k325tffg900-2" ConstrsSet="fifo_ddr_rdata" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/fifo_ddr_rdata_synth_1" IncludeInArchive="true">
+    <Run Id="fifo_ddr_data_synth_1" Type="Ft3:Synth" SrcSet="fifo_ddr_data" Part="xc7k325tffg900-2" ConstrsSet="fifo_ddr_data" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" Dir="$PRUNDIR/fifo_ddr_data_synth_1" IncludeInArchive="true">
      <Strategy Version="1" Minor="2">
        <StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2019">
          <Desc>Vivado Synthesis Defaults</Desc>
@@ -275,24 +277,7 @@
      <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
      <RQSFiles/>
    </Run>
-    <Run Id="ddr3_mig_impl_1" Type="Ft2:EntireDesign" Part="xc7k325tffg900-2" ConstrsSet="ddr3_mig" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="ddr3_mig_synth_1" IncludeInArchive="false" GenFullBitstream="true">
+    <Run Id="fifo_ddr_info_impl_1" Type="Ft2:EntireDesign" Part="xc7k325tffg900-2" ConstrsSet="fifo_ddr_info" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="fifo_ddr_info_synth_1" IncludeInArchive="false" GenFullBitstream="true">
      <Strategy Version="1" Minor="2">
        <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2019"/>
        <Step Id="init_design"/>
        <Step Id="opt_design"/>
        <Step Id="power_opt_design"/>
        <Step Id="place_design"/>
        <Step Id="post_place_power_opt_design"/>
        <Step Id="phys_opt_design" EnableStepBool="1"/>
        <Step Id="route_design"/>
        <Step Id="post_route_phys_opt_design"/>
        <Step Id="write_bitstream"/>
      </Strategy>
      <ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2019"/>
      <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
      <RQSFiles/>
    </Run>
    <Run Id="fifo_ddr_wdara_impl_1" Type="Ft2:EntireDesign" Part="xc7k325tffg900-2" ConstrsSet="fifo_ddr_wdara" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="fifo_ddr_wdara_synth_1" IncludeInArchive="false" GenFullBitstream="true">
      <Strategy Version="1" Minor="2">
        <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2019">
          <Desc>Default settings for Implementation.</Desc>
@@ -311,7 +296,7 @@
      <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
      <RQSFiles/>
    </Run>
-    <Run Id="fifo_ddr_rdata_impl_1" Type="Ft2:EntireDesign" Part="xc7k325tffg900-2" ConstrsSet="fifo_ddr_rdata" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="fifo_ddr_rdata_synth_1" IncludeInArchive="false" GenFullBitstream="true">
+    <Run Id="fifo_ddr_data_impl_1" Type="Ft2:EntireDesign" Part="xc7k325tffg900-2" ConstrsSet="fifo_ddr_data" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" SynthRun="fifo_ddr_data_synth_1" IncludeInArchive="false" GenFullBitstream="true">
      <Strategy Version="1" Minor="2">
        <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2019">
          <Desc>Default settings for Implementation.</Desc>