FPGALab/ddr3_general_design
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something remain

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包焕垲
2025-01-13 23:16:02 +08:00
parent 5436d507e7
commit 43f2f61570
1 changed files with 3 additions and 2 deletions
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ddr3_general_design.xpr
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@@ -73,15 +73,16 @@
<Attr Name="UsedIn" Val="simulation"/> <Attr Name="UsedIn" Val="simulation"/>
</FileInfo> </FileInfo>
</File> </File>
<File Path="$PSRCDIR/sources_1/new/ddr3_rw_out_ctrl.v"> <File Path="$PSRCDIR/sources_1/new/ddr3_top.v">
<FileInfo> <FileInfo>
<Attr Name="UsedIn" Val="synthesis"/> <Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/> <Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/> <Attr Name="UsedIn" Val="simulation"/>
</FileInfo> </FileInfo>
</File> </File>
<File Path="$PSRCDIR/sources_1/new/ddr3_top.v"> <File Path="$PSRCDIR/sources_1/new/ddr3_rw_out_ctrl.v">
<FileInfo> <FileInfo>
<Attr Name="AutoDisabled" Val="1"/>
<Attr Name="UsedIn" Val="synthesis"/> <Attr Name="UsedIn" Val="synthesis"/>
<Attr Name="UsedIn" Val="implementation"/> <Attr Name="UsedIn" Val="implementation"/>
<Attr Name="UsedIn" Val="simulation"/> <Attr Name="UsedIn" Val="simulation"/>