22 lines
483 B
Systemverilog
22 lines
483 B
Systemverilog
`ifndef MYCPU_VH
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`define MYCPU_VH
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`define BR_BUS_WD 33
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`define FS_TO_DS_BUS_WD 64
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`define DS_TO_ES_BUS_WD 174
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`define ES_TO_MS_BUS_WD 123
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`define MS_TO_WS_BUS_WD 70
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`define WS_TO_RF_BUS_WD 38
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`define DS_TO_FW_BUS_WD 10
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`define ES_TO_FW_BUS_WD 12
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`define MS_TO_FW_BUS_WD 6
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`define FW_TO_ES_BUS_WD 5
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`define MS_TO_ES_BUS_WD 32
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`define WS_TO_ES_BUS_WD 32
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`define DS_TO_LU_BUS_WD 10
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`define ES_TO_LU_BUS_WD 10
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`endif
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