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UnbalancedCat/neulacpu
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df981a178cf7ce914127b7adc8e527d6b40d09ce
neulacpu/lacpu/rtl/cpu
History
UnbalancedCat df981a178c [Modified] change div divu ip position form soc_top to exe_stage
2023-06-06 11:30:52 +08:00
..
alu.v
[Add] add op_mu.wl, op_mulh.w[u]
2023-05-23 12:09:45 +08:00
cpu_top.v
[Modified] change div divu ip position form soc_top to exe_stage
2023-06-06 11:30:52 +08:00
exe_stage.v
[Modified] change div divu ip position form soc_top to exe_stage
2023-06-06 11:30:52 +08:00
forward.v
[Add] add div.w[u], mod.w[u]
2023-05-27 23:52:30 +08:00
id_stage.v
[Modified] finish loaduse & fix little bug
2023-05-29 11:53:25 +08:00
if_stage.v
[Modified] little changes about file format and for dpi
2023-05-12 23:22:01 +08:00
loaduse.v
[Modified] finish loaduse & fix little bug
2023-05-29 11:53:25 +08:00
mem_stage.v
[Modified] finish loaduse & fix little bug
2023-05-29 11:53:25 +08:00
mycpu.v
[Add] add loaduse.v & fix little bug
2023-05-28 16:53:31 +08:00
regfile.v
[Add] add forwarding
2023-05-22 13:34:31 +08:00
tools.v
[Add] la32r cpu framework add
2023-05-12 21:00:39 +08:00
wb_stage.v
[Add] add forwarding
2023-05-22 13:34:31 +08:00
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