1237 lines
77 KiB
XML
1237 lines
77 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<wave_config>
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<wave_state>
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</wave_state>
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<db_ref_list>
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<db_ref path="cpu_tb_behav.wdb" id="1">
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<top_modules>
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<top_module name="cpu_tb" />
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<top_module name="glbl" />
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</top_modules>
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</db_ref>
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</db_ref_list>
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<zoom_setting>
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<ZoomStartTime time="0fs"></ZoomStartTime>
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<ZoomEndTime time="1405001fs"></ZoomEndTime>
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<Cursor1Time time="72434fs"></Cursor1Time>
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</zoom_setting>
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<column_width_setting>
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<NameColumnWidth column_width="316"></NameColumnWidth>
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<ValueColumnWidth column_width="375"></ValueColumnWidth>
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</column_width_setting>
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<WVObjectSize size="3" />
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<wave_markers>
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<marker time="45000" label="" />
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<marker time="75000" label="" />
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</wave_markers>
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<wvobject fp_name="group7" type="group">
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<obj_property name="label">debug</obj_property>
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<obj_property name="DisplayName">label</obj_property>
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<wvobject fp_name="/cpu_tb/resetn" type="logic">
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<obj_property name="ElementShortName">resetn</obj_property>
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<obj_property name="ObjectShortName">resetn</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/clk" type="logic">
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<obj_property name="ElementShortName">clk</obj_property>
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<obj_property name="ObjectShortName">clk</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/debug_wb_pc" type="array">
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<obj_property name="ElementShortName">debug_wb_pc[31:0]</obj_property>
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<obj_property name="ObjectShortName">debug_wb_pc[31:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/debug_wb_rf_wen" type="array">
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<obj_property name="ElementShortName">debug_wb_rf_wen[3:0]</obj_property>
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<obj_property name="ObjectShortName">debug_wb_rf_wen[3:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/debug_wb_rf_wnum" type="array">
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<obj_property name="ElementShortName">debug_wb_rf_wnum[4:0]</obj_property>
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<obj_property name="ObjectShortName">debug_wb_rf_wnum[4:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/debug_wb_rf_wdata" type="array">
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<obj_property name="ElementShortName">debug_wb_rf_wdata[31:0]</obj_property>
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<obj_property name="ObjectShortName">debug_wb_rf_wdata[31:0]</obj_property>
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</wvobject>
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</wvobject>
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<wvobject fp_name="group9" type="group">
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<obj_property name="label">cpu</obj_property>
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<obj_property name="DisplayName">label</obj_property>
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<obj_property name="isExpanded"></obj_property>
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<wvobject fp_name="group8" type="group">
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<obj_property name="label">if_stage</obj_property>
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<obj_property name="DisplayName">label</obj_property>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/clk" type="logic">
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<obj_property name="ElementShortName">clk</obj_property>
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<obj_property name="ObjectShortName">clk</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/reset" type="logic">
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<obj_property name="ElementShortName">reset</obj_property>
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<obj_property name="ObjectShortName">reset</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/ds_allowin" type="logic">
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<obj_property name="ElementShortName">ds_allowin</obj_property>
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<obj_property name="ObjectShortName">ds_allowin</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/br_bus" type="array">
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<obj_property name="ElementShortName">br_bus[32:0]</obj_property>
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<obj_property name="ObjectShortName">br_bus[32:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/fs_to_ds_valid" type="logic">
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<obj_property name="ElementShortName">fs_to_ds_valid</obj_property>
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<obj_property name="ObjectShortName">fs_to_ds_valid</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/fs_to_ds_bus" type="array">
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<obj_property name="ElementShortName">fs_to_ds_bus[63:0]</obj_property>
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<obj_property name="ObjectShortName">fs_to_ds_bus[63:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/inst_sram_en" type="logic">
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<obj_property name="ElementShortName">inst_sram_en</obj_property>
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<obj_property name="ObjectShortName">inst_sram_en</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/inst_sram_wen" type="array">
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<obj_property name="ElementShortName">inst_sram_wen[3:0]</obj_property>
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<obj_property name="ObjectShortName">inst_sram_wen[3:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/inst_sram_addr" type="array">
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<obj_property name="ElementShortName">inst_sram_addr[31:0]</obj_property>
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<obj_property name="ObjectShortName">inst_sram_addr[31:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/inst_sram_wdata" type="array">
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<obj_property name="ElementShortName">inst_sram_wdata[31:0]</obj_property>
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<obj_property name="ObjectShortName">inst_sram_wdata[31:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/inst_sram_rdata" type="array">
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<obj_property name="ElementShortName">inst_sram_rdata[31:0]</obj_property>
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<obj_property name="ObjectShortName">inst_sram_rdata[31:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/fs_valid" type="logic">
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<obj_property name="ElementShortName">fs_valid</obj_property>
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<obj_property name="ObjectShortName">fs_valid</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/fs_ready_go" type="logic">
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<obj_property name="ElementShortName">fs_ready_go</obj_property>
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<obj_property name="ObjectShortName">fs_ready_go</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/fs_allowin" type="logic">
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<obj_property name="ElementShortName">fs_allowin</obj_property>
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<obj_property name="ObjectShortName">fs_allowin</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/to_fs_valid" type="logic">
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<obj_property name="ElementShortName">to_fs_valid</obj_property>
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<obj_property name="ObjectShortName">to_fs_valid</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/seq_pc" type="array">
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<obj_property name="ElementShortName">seq_pc[31:0]</obj_property>
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<obj_property name="ObjectShortName">seq_pc[31:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/nextpc" type="array">
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<obj_property name="ElementShortName">nextpc[31:0]</obj_property>
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<obj_property name="ObjectShortName">nextpc[31:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/br_taken" type="logic">
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<obj_property name="ElementShortName">br_taken</obj_property>
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<obj_property name="ObjectShortName">br_taken</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/br_target" type="array">
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<obj_property name="ElementShortName">br_target[31:0]</obj_property>
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<obj_property name="ObjectShortName">br_target[31:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/fs_inst" type="array">
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<obj_property name="ElementShortName">fs_inst[31:0]</obj_property>
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<obj_property name="ObjectShortName">fs_inst[31:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/if_stage/fs_pc" type="array">
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<obj_property name="ElementShortName">fs_pc[31:0]</obj_property>
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<obj_property name="ObjectShortName">fs_pc[31:0]</obj_property>
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</wvobject>
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</wvobject>
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<wvobject fp_name="group10" type="group">
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<obj_property name="label">id_stage</obj_property>
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<obj_property name="DisplayName">label</obj_property>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/clk" type="logic">
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<obj_property name="ElementShortName">clk</obj_property>
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<obj_property name="ObjectShortName">clk</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/reset" type="logic">
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<obj_property name="ElementShortName">reset</obj_property>
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<obj_property name="ObjectShortName">reset</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/es_allowin" type="logic">
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<obj_property name="ElementShortName">es_allowin</obj_property>
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<obj_property name="ObjectShortName">es_allowin</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/ds_allowin" type="logic">
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<obj_property name="ElementShortName">ds_allowin</obj_property>
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<obj_property name="ObjectShortName">ds_allowin</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/fs_to_ds_valid" type="logic">
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<obj_property name="ElementShortName">fs_to_ds_valid</obj_property>
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<obj_property name="ObjectShortName">fs_to_ds_valid</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/fs_to_ds_bus" type="array">
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<obj_property name="ElementShortName">fs_to_ds_bus[63:0]</obj_property>
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<obj_property name="ObjectShortName">fs_to_ds_bus[63:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/ds_to_es_valid" type="logic">
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<obj_property name="ElementShortName">ds_to_es_valid</obj_property>
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<obj_property name="ObjectShortName">ds_to_es_valid</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/ds_to_es_bus" type="array">
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<obj_property name="ElementShortName">ds_to_es_bus[173:0]</obj_property>
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<obj_property name="ObjectShortName">ds_to_es_bus[173:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/ws_to_rf_bus" type="array">
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<obj_property name="ElementShortName">ws_to_rf_bus[37:0]</obj_property>
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<obj_property name="ObjectShortName">ws_to_rf_bus[37:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/ds_to_fw_bus" type="array">
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<obj_property name="ElementShortName">ds_to_fw_bus[9:0]</obj_property>
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<obj_property name="ObjectShortName">ds_to_fw_bus[9:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/ds_valid" type="logic">
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<obj_property name="ElementShortName">ds_valid</obj_property>
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<obj_property name="ObjectShortName">ds_valid</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/ds_ready_go" type="logic">
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<obj_property name="ElementShortName">ds_ready_go</obj_property>
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<obj_property name="ObjectShortName">ds_ready_go</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/fs_pc" type="array">
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<obj_property name="ElementShortName">fs_pc[31:0]</obj_property>
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<obj_property name="ObjectShortName">fs_pc[31:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/fs_to_ds_bus_r" type="array">
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<obj_property name="ElementShortName">fs_to_ds_bus_r[63:0]</obj_property>
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<obj_property name="ObjectShortName">fs_to_ds_bus_r[63:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/ds_inst" type="array">
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<obj_property name="ElementShortName">ds_inst[31:0]</obj_property>
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<obj_property name="ObjectShortName">ds_inst[31:0]</obj_property>
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<obj_property name="Radix">BINARYRADIX</obj_property>
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<obj_property name="CustomSignalColor">#FFA500</obj_property>
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<obj_property name="UseCustomSignalColor">true</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/ds_pc" type="array">
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<obj_property name="ElementShortName">ds_pc[31:0]</obj_property>
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<obj_property name="ObjectShortName">ds_pc[31:0]</obj_property>
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<obj_property name="CustomSignalColor">#FFA500</obj_property>
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<obj_property name="UseCustomSignalColor">true</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/rf_we" type="logic">
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<obj_property name="ElementShortName">rf_we</obj_property>
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<obj_property name="ObjectShortName">rf_we</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/rf_waddr" type="array">
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<obj_property name="ElementShortName">rf_waddr[4:0]</obj_property>
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<obj_property name="ObjectShortName">rf_waddr[4:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/rf_wdata" type="array">
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<obj_property name="ElementShortName">rf_wdata[31:0]</obj_property>
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<obj_property name="ObjectShortName">rf_wdata[31:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/alu_op" type="array">
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<obj_property name="ElementShortName">alu_op[18:0]</obj_property>
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<obj_property name="ObjectShortName">alu_op[18:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/src1_is_pc" type="logic">
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<obj_property name="ElementShortName">src1_is_pc</obj_property>
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<obj_property name="ObjectShortName">src1_is_pc</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/src2_is_imm" type="logic">
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<obj_property name="ElementShortName">src2_is_imm</obj_property>
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<obj_property name="ObjectShortName">src2_is_imm</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/src2_is_4" type="logic">
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<obj_property name="ElementShortName">src2_is_4</obj_property>
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<obj_property name="ObjectShortName">src2_is_4</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/mem_to_reg" type="logic">
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<obj_property name="ElementShortName">mem_to_reg</obj_property>
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<obj_property name="ObjectShortName">mem_to_reg</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/reg_we" type="logic">
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<obj_property name="ElementShortName">reg_we</obj_property>
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<obj_property name="ObjectShortName">reg_we</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/mem_we" type="logic">
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<obj_property name="ElementShortName">mem_we</obj_property>
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<obj_property name="ObjectShortName">mem_we</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/load_op" type="array">
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<obj_property name="ElementShortName">load_op[4:0]</obj_property>
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<obj_property name="ObjectShortName">load_op[4:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/store_op" type="array">
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<obj_property name="ElementShortName">store_op[2:0]</obj_property>
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<obj_property name="ObjectShortName">store_op[2:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/branch_op" type="array">
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<obj_property name="ElementShortName">branch_op[8:0]</obj_property>
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<obj_property name="ObjectShortName">branch_op[8:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/dest" type="array">
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<obj_property name="ElementShortName">dest[4:0]</obj_property>
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<obj_property name="ObjectShortName">dest[4:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/imm" type="array">
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<obj_property name="ElementShortName">imm[31:0]</obj_property>
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<obj_property name="ObjectShortName">imm[31:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/op" type="array">
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<obj_property name="ElementShortName">op[21:0]</obj_property>
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<obj_property name="ObjectShortName">op[21:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/ra" type="array">
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<obj_property name="ElementShortName">ra[4:0]</obj_property>
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<obj_property name="ObjectShortName">ra[4:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/rk" type="array">
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<obj_property name="ElementShortName">rk[4:0]</obj_property>
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<obj_property name="ObjectShortName">rk[4:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/rj" type="array">
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<obj_property name="ElementShortName">rj[4:0]</obj_property>
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<obj_property name="ObjectShortName">rj[4:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/rd" type="array">
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<obj_property name="ElementShortName">rd[4:0]</obj_property>
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<obj_property name="ObjectShortName">rd[4:0]</obj_property>
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</wvobject>
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<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/op6_d" type="array">
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<obj_property name="ElementShortName">op6_d[7:0]</obj_property>
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<obj_property name="ObjectShortName">op6_d[7:0]</obj_property>
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</wvobject>
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|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/op7_d" type="array">
|
|
<obj_property name="ElementShortName">op7_d[7:0]</obj_property>
|
|
<obj_property name="ObjectShortName">op7_d[7:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/op10_d" type="array">
|
|
<obj_property name="ElementShortName">op10_d[7:0]</obj_property>
|
|
<obj_property name="ObjectShortName">op10_d[7:0]</obj_property>
|
|
<obj_property name="Radix">BINARYRADIX</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/op17_d" type="array">
|
|
<obj_property name="ElementShortName">op17_d[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">op17_d[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_addw" type="logic">
|
|
<obj_property name="ElementShortName">inst_addw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_addw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_subw" type="logic">
|
|
<obj_property name="ElementShortName">inst_subw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_subw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_addiw" type="logic">
|
|
<obj_property name="ElementShortName">inst_addiw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_addiw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_lu12iw" type="logic">
|
|
<obj_property name="ElementShortName">inst_lu12iw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_lu12iw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_slt" type="logic">
|
|
<obj_property name="ElementShortName">inst_slt</obj_property>
|
|
<obj_property name="ObjectShortName">inst_slt</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_sltu" type="logic">
|
|
<obj_property name="ElementShortName">inst_sltu</obj_property>
|
|
<obj_property name="ObjectShortName">inst_sltu</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_slti" type="logic">
|
|
<obj_property name="ElementShortName">inst_slti</obj_property>
|
|
<obj_property name="ObjectShortName">inst_slti</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_sltui" type="logic">
|
|
<obj_property name="ElementShortName">inst_sltui</obj_property>
|
|
<obj_property name="ObjectShortName">inst_sltui</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_pcaddu12i" type="logic">
|
|
<obj_property name="ElementShortName">inst_pcaddu12i</obj_property>
|
|
<obj_property name="ObjectShortName">inst_pcaddu12i</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_and" type="logic">
|
|
<obj_property name="ElementShortName">inst_and</obj_property>
|
|
<obj_property name="ObjectShortName">inst_and</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_or" type="logic">
|
|
<obj_property name="ElementShortName">inst_or</obj_property>
|
|
<obj_property name="ObjectShortName">inst_or</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_nor" type="logic">
|
|
<obj_property name="ElementShortName">inst_nor</obj_property>
|
|
<obj_property name="ObjectShortName">inst_nor</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_xor" type="logic">
|
|
<obj_property name="ElementShortName">inst_xor</obj_property>
|
|
<obj_property name="ObjectShortName">inst_xor</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_andi" type="logic">
|
|
<obj_property name="ElementShortName">inst_andi</obj_property>
|
|
<obj_property name="ObjectShortName">inst_andi</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_ori" type="logic">
|
|
<obj_property name="ElementShortName">inst_ori</obj_property>
|
|
<obj_property name="ObjectShortName">inst_ori</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_xori" type="logic">
|
|
<obj_property name="ElementShortName">inst_xori</obj_property>
|
|
<obj_property name="ObjectShortName">inst_xori</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_sllw" type="logic">
|
|
<obj_property name="ElementShortName">inst_sllw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_sllw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_srlw" type="logic">
|
|
<obj_property name="ElementShortName">inst_srlw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_srlw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_sraw" type="logic">
|
|
<obj_property name="ElementShortName">inst_sraw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_sraw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_slliw" type="logic">
|
|
<obj_property name="ElementShortName">inst_slliw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_slliw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_srliw" type="logic">
|
|
<obj_property name="ElementShortName">inst_srliw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_srliw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_sraiw" type="logic">
|
|
<obj_property name="ElementShortName">inst_sraiw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_sraiw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_mulw" type="logic">
|
|
<obj_property name="ElementShortName">inst_mulw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_mulw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_mulhw" type="logic">
|
|
<obj_property name="ElementShortName">inst_mulhw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_mulhw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_mulhwu" type="logic">
|
|
<obj_property name="ElementShortName">inst_mulhwu</obj_property>
|
|
<obj_property name="ObjectShortName">inst_mulhwu</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_beq" type="logic">
|
|
<obj_property name="ElementShortName">inst_beq</obj_property>
|
|
<obj_property name="ObjectShortName">inst_beq</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_bne" type="logic">
|
|
<obj_property name="ElementShortName">inst_bne</obj_property>
|
|
<obj_property name="ObjectShortName">inst_bne</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_blt" type="logic">
|
|
<obj_property name="ElementShortName">inst_blt</obj_property>
|
|
<obj_property name="ObjectShortName">inst_blt</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_bge" type="logic">
|
|
<obj_property name="ElementShortName">inst_bge</obj_property>
|
|
<obj_property name="ObjectShortName">inst_bge</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_bltu" type="logic">
|
|
<obj_property name="ElementShortName">inst_bltu</obj_property>
|
|
<obj_property name="ObjectShortName">inst_bltu</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_bgeu" type="logic">
|
|
<obj_property name="ElementShortName">inst_bgeu</obj_property>
|
|
<obj_property name="ObjectShortName">inst_bgeu</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_b" type="logic">
|
|
<obj_property name="ElementShortName">inst_b</obj_property>
|
|
<obj_property name="ObjectShortName">inst_b</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_bl" type="logic">
|
|
<obj_property name="ElementShortName">inst_bl</obj_property>
|
|
<obj_property name="ObjectShortName">inst_bl</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_jirl" type="logic">
|
|
<obj_property name="ElementShortName">inst_jirl</obj_property>
|
|
<obj_property name="ObjectShortName">inst_jirl</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_ldb" type="logic">
|
|
<obj_property name="ElementShortName">inst_ldb</obj_property>
|
|
<obj_property name="ObjectShortName">inst_ldb</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_ldh" type="logic">
|
|
<obj_property name="ElementShortName">inst_ldh</obj_property>
|
|
<obj_property name="ObjectShortName">inst_ldh</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_ldw" type="logic">
|
|
<obj_property name="ElementShortName">inst_ldw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_ldw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_ldbu" type="logic">
|
|
<obj_property name="ElementShortName">inst_ldbu</obj_property>
|
|
<obj_property name="ObjectShortName">inst_ldbu</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_ldhu" type="logic">
|
|
<obj_property name="ElementShortName">inst_ldhu</obj_property>
|
|
<obj_property name="ObjectShortName">inst_ldhu</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_stb" type="logic">
|
|
<obj_property name="ElementShortName">inst_stb</obj_property>
|
|
<obj_property name="ObjectShortName">inst_stb</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_sth" type="logic">
|
|
<obj_property name="ElementShortName">inst_sth</obj_property>
|
|
<obj_property name="ObjectShortName">inst_sth</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_stw" type="logic">
|
|
<obj_property name="ElementShortName">inst_stw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_stw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_divw" type="logic">
|
|
<obj_property name="ElementShortName">inst_divw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_divw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_modw" type="logic">
|
|
<obj_property name="ElementShortName">inst_modw</obj_property>
|
|
<obj_property name="ObjectShortName">inst_modw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_divwu" type="logic">
|
|
<obj_property name="ElementShortName">inst_divwu</obj_property>
|
|
<obj_property name="ObjectShortName">inst_divwu</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/inst_modwu" type="logic">
|
|
<obj_property name="ElementShortName">inst_modwu</obj_property>
|
|
<obj_property name="ObjectShortName">inst_modwu</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/dst_is_r1" type="logic">
|
|
<obj_property name="ElementShortName">dst_is_r1</obj_property>
|
|
<obj_property name="ObjectShortName">dst_is_r1</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/rf_raddr1" type="array">
|
|
<obj_property name="ElementShortName">rf_raddr1[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">rf_raddr1[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/rf_rdata1" type="array">
|
|
<obj_property name="ElementShortName">rf_rdata1[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">rf_rdata1[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/rf_raddr2" type="array">
|
|
<obj_property name="ElementShortName">rf_raddr2[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">rf_raddr2[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/rf_rdata2" type="array">
|
|
<obj_property name="ElementShortName">rf_rdata2[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">rf_rdata2[31:0]</obj_property>
|
|
</wvobject>
|
|
</wvobject>
|
|
<wvobject fp_name="group11" type="group">
|
|
<obj_property name="label">exe_stage</obj_property>
|
|
<obj_property name="DisplayName">label</obj_property>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/clk" type="logic">
|
|
<obj_property name="ElementShortName">clk</obj_property>
|
|
<obj_property name="ObjectShortName">clk</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/reset" type="logic">
|
|
<obj_property name="ElementShortName">reset</obj_property>
|
|
<obj_property name="ObjectShortName">reset</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/ms_allowin" type="logic">
|
|
<obj_property name="ElementShortName">ms_allowin</obj_property>
|
|
<obj_property name="ObjectShortName">ms_allowin</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_allowin" type="logic">
|
|
<obj_property name="ElementShortName">es_allowin</obj_property>
|
|
<obj_property name="ObjectShortName">es_allowin</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/ds_to_es_valid" type="logic">
|
|
<obj_property name="ElementShortName">ds_to_es_valid</obj_property>
|
|
<obj_property name="ObjectShortName">ds_to_es_valid</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/ds_to_es_bus" type="array">
|
|
<obj_property name="ElementShortName">ds_to_es_bus[173:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ds_to_es_bus[173:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_to_ms_valid" type="logic">
|
|
<obj_property name="ElementShortName">es_to_ms_valid</obj_property>
|
|
<obj_property name="ObjectShortName">es_to_ms_valid</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_to_ms_bus" type="array">
|
|
<obj_property name="ElementShortName">es_to_ms_bus[122:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_to_ms_bus[122:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/data_sram_en" type="logic">
|
|
<obj_property name="ElementShortName">data_sram_en</obj_property>
|
|
<obj_property name="ObjectShortName">data_sram_en</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/data_sram_wen" type="array">
|
|
<obj_property name="ElementShortName">data_sram_wen[3:0]</obj_property>
|
|
<obj_property name="ObjectShortName">data_sram_wen[3:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/data_sram_addr" type="array">
|
|
<obj_property name="ElementShortName">data_sram_addr[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">data_sram_addr[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/data_sram_wdata" type="array">
|
|
<obj_property name="ElementShortName">data_sram_wdata[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">data_sram_wdata[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_to_fw_bus" type="array">
|
|
<obj_property name="ElementShortName">es_to_fw_bus[11:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_to_fw_bus[11:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/fw_to_es_bus" type="array">
|
|
<obj_property name="ElementShortName">fw_to_es_bus[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">fw_to_es_bus[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/ms_to_ds_bus" type="array">
|
|
<obj_property name="ElementShortName">ms_to_ds_bus[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_to_ds_bus[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/ws_to_ds_bus" type="array">
|
|
<obj_property name="ElementShortName">ws_to_ds_bus[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ws_to_ds_bus[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_div_enable" type="logic">
|
|
<obj_property name="ElementShortName">es_div_enable</obj_property>
|
|
<obj_property name="ObjectShortName">es_div_enable</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_div_sign" type="logic">
|
|
<obj_property name="ElementShortName">es_div_sign</obj_property>
|
|
<obj_property name="ObjectShortName">es_div_sign</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_rf_rdata1" type="array">
|
|
<obj_property name="ElementShortName">es_rf_rdata1[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_rf_rdata1[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_rf_rdata2" type="array">
|
|
<obj_property name="ElementShortName">es_rf_rdata2[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_rf_rdata2[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/div_complete" type="logic">
|
|
<obj_property name="ElementShortName">div_complete</obj_property>
|
|
<obj_property name="ObjectShortName">div_complete</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_valid" type="logic">
|
|
<obj_property name="ElementShortName">es_valid</obj_property>
|
|
<obj_property name="ObjectShortName">es_valid</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_ready_go" type="logic">
|
|
<obj_property name="ElementShortName">es_ready_go</obj_property>
|
|
<obj_property name="ObjectShortName">es_ready_go</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/ds_to_es_bus_r" type="array">
|
|
<obj_property name="ElementShortName">ds_to_es_bus_r[173:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ds_to_es_bus_r[173:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_alu_op" type="array">
|
|
<obj_property name="ElementShortName">es_alu_op[18:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_alu_op[18:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_src1_is_pc" type="logic">
|
|
<obj_property name="ElementShortName">es_src1_is_pc</obj_property>
|
|
<obj_property name="ObjectShortName">es_src1_is_pc</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_src2_is_imm" type="logic">
|
|
<obj_property name="ElementShortName">es_src2_is_imm</obj_property>
|
|
<obj_property name="ObjectShortName">es_src2_is_imm</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_src2_is_4" type="logic">
|
|
<obj_property name="ElementShortName">es_src2_is_4</obj_property>
|
|
<obj_property name="ObjectShortName">es_src2_is_4</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_mem_to_reg" type="logic">
|
|
<obj_property name="ElementShortName">es_mem_to_reg</obj_property>
|
|
<obj_property name="ObjectShortName">es_mem_to_reg</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_reg_we" type="logic">
|
|
<obj_property name="ElementShortName">es_reg_we</obj_property>
|
|
<obj_property name="ObjectShortName">es_reg_we</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_mem_we" type="logic">
|
|
<obj_property name="ElementShortName">es_mem_we</obj_property>
|
|
<obj_property name="ObjectShortName">es_mem_we</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_load_op" type="array">
|
|
<obj_property name="ElementShortName">es_load_op[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_load_op[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_store_op" type="array">
|
|
<obj_property name="ElementShortName">es_store_op[2:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_store_op[2:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_branch_op" type="array">
|
|
<obj_property name="ElementShortName">es_branch_op[8:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_branch_op[8:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_dest" type="array">
|
|
<obj_property name="ElementShortName">es_dest[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_dest[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_imm" type="array">
|
|
<obj_property name="ElementShortName">es_imm[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_imm[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_pc" type="array">
|
|
<obj_property name="ElementShortName">es_pc[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_pc[31:0]</obj_property>
|
|
<obj_property name="CustomSignalColor">#FFA500</obj_property>
|
|
<obj_property name="UseCustomSignalColor">true</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/ms_alu_result" type="array">
|
|
<obj_property name="ElementShortName">ms_alu_result[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_alu_result[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/ws_rf_wdata" type="array">
|
|
<obj_property name="ElementShortName">ws_rf_wdata[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ws_rf_wdata[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_src1_is_es_dest" type="logic">
|
|
<obj_property name="ElementShortName">es_src1_is_es_dest</obj_property>
|
|
<obj_property name="ObjectShortName">es_src1_is_es_dest</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_src1_is_ms_dest" type="logic">
|
|
<obj_property name="ElementShortName">es_src1_is_ms_dest</obj_property>
|
|
<obj_property name="ObjectShortName">es_src1_is_ms_dest</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_src2_is_es_dest" type="logic">
|
|
<obj_property name="ElementShortName">es_src2_is_es_dest</obj_property>
|
|
<obj_property name="ObjectShortName">es_src2_is_es_dest</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_src2_is_ms_dest" type="logic">
|
|
<obj_property name="ElementShortName">es_src2_is_ms_dest</obj_property>
|
|
<obj_property name="ObjectShortName">es_src2_is_ms_dest</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_data_is_rf_wdata" type="logic">
|
|
<obj_property name="ElementShortName">es_data_is_rf_wdata</obj_property>
|
|
<obj_property name="ObjectShortName">es_data_is_rf_wdata</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/br_target" type="array">
|
|
<obj_property name="ElementShortName">br_target[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">br_target[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_alu_src1" type="array">
|
|
<obj_property name="ElementShortName">es_alu_src1[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_alu_src1[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_alu_src2" type="array">
|
|
<obj_property name="ElementShortName">es_alu_src2[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_alu_src2[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_alu_result" type="array">
|
|
<obj_property name="ElementShortName">es_alu_result[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_alu_result[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_Carry" type="logic">
|
|
<obj_property name="ElementShortName">es_Carry</obj_property>
|
|
<obj_property name="ObjectShortName">es_Carry</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_Sign" type="logic">
|
|
<obj_property name="ElementShortName">es_Sign</obj_property>
|
|
<obj_property name="ObjectShortName">es_Sign</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_Overflow" type="logic">
|
|
<obj_property name="ElementShortName">es_Overflow</obj_property>
|
|
<obj_property name="ObjectShortName">es_Overflow</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_Zero" type="logic">
|
|
<obj_property name="ElementShortName">es_Zero</obj_property>
|
|
<obj_property name="ObjectShortName">es_Zero</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_inst_divw" type="logic">
|
|
<obj_property name="ElementShortName">es_inst_divw</obj_property>
|
|
<obj_property name="ObjectShortName">es_inst_divw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_inst_modw" type="logic">
|
|
<obj_property name="ElementShortName">es_inst_modw</obj_property>
|
|
<obj_property name="ObjectShortName">es_inst_modw</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_inst_divwu" type="logic">
|
|
<obj_property name="ElementShortName">es_inst_divwu</obj_property>
|
|
<obj_property name="ObjectShortName">es_inst_divwu</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/es_inst_modwu" type="logic">
|
|
<obj_property name="ElementShortName">es_inst_modwu</obj_property>
|
|
<obj_property name="ObjectShortName">es_inst_modwu</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/div_op" type="array">
|
|
<obj_property name="ElementShortName">div_op[1:0]</obj_property>
|
|
<obj_property name="ObjectShortName">div_op[1:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/exe_stage/div_stall" type="logic">
|
|
<obj_property name="ElementShortName">div_stall</obj_property>
|
|
<obj_property name="ObjectShortName">div_stall</obj_property>
|
|
</wvobject>
|
|
</wvobject>
|
|
<wvobject fp_name="group12" type="group">
|
|
<obj_property name="label">mem_stage</obj_property>
|
|
<obj_property name="DisplayName">label</obj_property>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/clk" type="logic">
|
|
<obj_property name="ElementShortName">clk</obj_property>
|
|
<obj_property name="ObjectShortName">clk</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/reset" type="logic">
|
|
<obj_property name="ElementShortName">reset</obj_property>
|
|
<obj_property name="ObjectShortName">reset</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ws_allowin" type="logic">
|
|
<obj_property name="ElementShortName">ws_allowin</obj_property>
|
|
<obj_property name="ObjectShortName">ws_allowin</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_allowin" type="logic">
|
|
<obj_property name="ElementShortName">ms_allowin</obj_property>
|
|
<obj_property name="ObjectShortName">ms_allowin</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/es_to_ms_valid" type="logic">
|
|
<obj_property name="ElementShortName">es_to_ms_valid</obj_property>
|
|
<obj_property name="ObjectShortName">es_to_ms_valid</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/es_to_ms_bus" type="array">
|
|
<obj_property name="ElementShortName">es_to_ms_bus[122:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_to_ms_bus[122:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_to_ws_valid" type="logic">
|
|
<obj_property name="ElementShortName">ms_to_ws_valid</obj_property>
|
|
<obj_property name="ObjectShortName">ms_to_ws_valid</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_to_ws_bus" type="array">
|
|
<obj_property name="ElementShortName">ms_to_ws_bus[69:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_to_ws_bus[69:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/br_bus" type="array">
|
|
<obj_property name="ElementShortName">br_bus[32:0]</obj_property>
|
|
<obj_property name="ObjectShortName">br_bus[32:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/data_sram_rdata" type="array">
|
|
<obj_property name="ElementShortName">data_sram_rdata[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">data_sram_rdata[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_to_fw_bus" type="array">
|
|
<obj_property name="ElementShortName">ms_to_fw_bus[5:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_to_fw_bus[5:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_to_es_bus" type="array">
|
|
<obj_property name="ElementShortName">ms_to_es_bus[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_to_es_bus[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/div_result" type="array">
|
|
<obj_property name="ElementShortName">div_result[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">div_result[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/mod_result" type="array">
|
|
<obj_property name="ElementShortName">mod_result[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">mod_result[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_valid" type="logic">
|
|
<obj_property name="ElementShortName">ms_valid</obj_property>
|
|
<obj_property name="ObjectShortName">ms_valid</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_ready_go" type="logic">
|
|
<obj_property name="ElementShortName">ms_ready_go</obj_property>
|
|
<obj_property name="ObjectShortName">ms_ready_go</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/es_to_ms_bus_r" type="array">
|
|
<obj_property name="ElementShortName">es_to_ms_bus_r[122:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_to_ms_bus_r[122:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/br_target" type="array">
|
|
<obj_property name="ElementShortName">br_target[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">br_target[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_branch_op" type="array">
|
|
<obj_property name="ElementShortName">ms_branch_op[8:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_branch_op[8:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_load_op" type="array">
|
|
<obj_property name="ElementShortName">ms_load_op[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_load_op[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_store_op" type="array">
|
|
<obj_property name="ElementShortName">ms_store_op[2:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_store_op[2:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_mem_to_reg" type="logic">
|
|
<obj_property name="ElementShortName">ms_mem_to_reg</obj_property>
|
|
<obj_property name="ObjectShortName">ms_mem_to_reg</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_reg_we" type="logic">
|
|
<obj_property name="ElementShortName">ms_reg_we</obj_property>
|
|
<obj_property name="ObjectShortName">ms_reg_we</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_dest" type="array">
|
|
<obj_property name="ElementShortName">ms_dest[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_dest[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_alu_result" type="array">
|
|
<obj_property name="ElementShortName">ms_alu_result[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_alu_result[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_pc" type="array">
|
|
<obj_property name="ElementShortName">ms_pc[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_pc[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_div_op" type="array">
|
|
<obj_property name="ElementShortName">ms_div_op[1:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_div_op[1:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_Carry" type="logic">
|
|
<obj_property name="ElementShortName">ms_Carry</obj_property>
|
|
<obj_property name="ObjectShortName">ms_Carry</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_Sign" type="logic">
|
|
<obj_property name="ElementShortName">ms_Sign</obj_property>
|
|
<obj_property name="ObjectShortName">ms_Sign</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_Overflow" type="logic">
|
|
<obj_property name="ElementShortName">ms_Overflow</obj_property>
|
|
<obj_property name="ObjectShortName">ms_Overflow</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_Zero" type="logic">
|
|
<obj_property name="ElementShortName">ms_Zero</obj_property>
|
|
<obj_property name="ObjectShortName">ms_Zero</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/br_taken" type="logic">
|
|
<obj_property name="ElementShortName">br_taken</obj_property>
|
|
<obj_property name="ObjectShortName">br_taken</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/mem_result" type="array">
|
|
<obj_property name="ElementShortName">mem_result[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">mem_result[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/mem_stage/ms_final_result" type="array">
|
|
<obj_property name="ElementShortName">ms_final_result[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_final_result[31:0]</obj_property>
|
|
</wvobject>
|
|
</wvobject>
|
|
<wvobject fp_name="group13" type="group">
|
|
<obj_property name="label">wb_stage</obj_property>
|
|
<obj_property name="DisplayName">label</obj_property>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/clk" type="logic">
|
|
<obj_property name="ElementShortName">clk</obj_property>
|
|
<obj_property name="ObjectShortName">clk</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/reset" type="logic">
|
|
<obj_property name="ElementShortName">reset</obj_property>
|
|
<obj_property name="ObjectShortName">reset</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/ws_allowin" type="logic">
|
|
<obj_property name="ElementShortName">ws_allowin</obj_property>
|
|
<obj_property name="ObjectShortName">ws_allowin</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/ms_to_ws_valid" type="logic">
|
|
<obj_property name="ElementShortName">ms_to_ws_valid</obj_property>
|
|
<obj_property name="ObjectShortName">ms_to_ws_valid</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/ms_to_ws_bus" type="array">
|
|
<obj_property name="ElementShortName">ms_to_ws_bus[69:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_to_ws_bus[69:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/ws_to_rf_bus" type="array">
|
|
<obj_property name="ElementShortName">ws_to_rf_bus[37:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ws_to_rf_bus[37:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/ws_to_es_bus" type="array">
|
|
<obj_property name="ElementShortName">ws_to_es_bus[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ws_to_es_bus[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/debug_wb_pc" type="array">
|
|
<obj_property name="ElementShortName">debug_wb_pc[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">debug_wb_pc[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/debug_wb_rf_wen" type="array">
|
|
<obj_property name="ElementShortName">debug_wb_rf_wen[3:0]</obj_property>
|
|
<obj_property name="ObjectShortName">debug_wb_rf_wen[3:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/debug_wb_rf_wnum" type="array">
|
|
<obj_property name="ElementShortName">debug_wb_rf_wnum[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">debug_wb_rf_wnum[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/debug_wb_rf_wdata" type="array">
|
|
<obj_property name="ElementShortName">debug_wb_rf_wdata[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">debug_wb_rf_wdata[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/ws_valid" type="logic">
|
|
<obj_property name="ElementShortName">ws_valid</obj_property>
|
|
<obj_property name="ObjectShortName">ws_valid</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/ws_ready_go" type="logic">
|
|
<obj_property name="ElementShortName">ws_ready_go</obj_property>
|
|
<obj_property name="ObjectShortName">ws_ready_go</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/ms_to_ws_bus_r" type="array">
|
|
<obj_property name="ElementShortName">ms_to_ws_bus_r[69:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_to_ws_bus_r[69:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/ws_gr_we" type="logic">
|
|
<obj_property name="ElementShortName">ws_gr_we</obj_property>
|
|
<obj_property name="ObjectShortName">ws_gr_we</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/ws_dest" type="array">
|
|
<obj_property name="ElementShortName">ws_dest[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ws_dest[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/ws_final_result" type="array">
|
|
<obj_property name="ElementShortName">ws_final_result[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ws_final_result[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/ws_pc" type="array">
|
|
<obj_property name="ElementShortName">ws_pc[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ws_pc[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/rf_we" type="logic">
|
|
<obj_property name="ElementShortName">rf_we</obj_property>
|
|
<obj_property name="ObjectShortName">rf_we</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/rf_waddr" type="array">
|
|
<obj_property name="ElementShortName">rf_waddr[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">rf_waddr[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/rf_wdata" type="array">
|
|
<obj_property name="ElementShortName">rf_wdata[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">rf_wdata[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/wb_stage/ws_reg_we" type="logic">
|
|
<obj_property name="ElementShortName">ws_reg_we</obj_property>
|
|
<obj_property name="ObjectShortName">ws_reg_we</obj_property>
|
|
</wvobject>
|
|
</wvobject>
|
|
<wvobject fp_name="group213" type="group">
|
|
<obj_property name="label">forward</obj_property>
|
|
<obj_property name="DisplayName">label</obj_property>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/clk" type="logic">
|
|
<obj_property name="ElementShortName">clk</obj_property>
|
|
<obj_property name="ObjectShortName">clk</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/reset" type="logic">
|
|
<obj_property name="ElementShortName">reset</obj_property>
|
|
<obj_property name="ObjectShortName">reset</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/ds_to_fw_bus" type="array">
|
|
<obj_property name="ElementShortName">ds_to_fw_bus[9:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ds_to_fw_bus[9:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/es_to_fw_bus" type="array">
|
|
<obj_property name="ElementShortName">es_to_fw_bus[11:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_to_fw_bus[11:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/ms_to_fw_bus" type="array">
|
|
<obj_property name="ElementShortName">ms_to_fw_bus[5:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_to_fw_bus[5:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/fw_to_es_bus" type="array">
|
|
<obj_property name="ElementShortName">fw_to_es_bus[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">fw_to_es_bus[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/ds_to_fw_bus_r" type="array">
|
|
<obj_property name="ElementShortName">ds_to_fw_bus_r[9:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ds_to_fw_bus_r[9:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/es_to_fw_bus_r" type="array">
|
|
<obj_property name="ElementShortName">es_to_fw_bus_r[11:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_to_fw_bus_r[11:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/ms_to_fw_bus_r" type="array">
|
|
<obj_property name="ElementShortName">ms_to_fw_bus_r[5:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_to_fw_bus_r[5:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/ds_rf_raddr1" type="array">
|
|
<obj_property name="ElementShortName">ds_rf_raddr1[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ds_rf_raddr1[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/ds_rf_raddr2" type="array">
|
|
<obj_property name="ElementShortName">ds_rf_raddr2[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ds_rf_raddr2[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/es_rf_raddr2" type="array">
|
|
<obj_property name="ElementShortName">es_rf_raddr2[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_rf_raddr2[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/es_dest" type="array">
|
|
<obj_property name="ElementShortName">es_dest[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">es_dest[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/ms_dest" type="array">
|
|
<obj_property name="ElementShortName">ms_dest[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">ms_dest[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/es_mem_we" type="logic">
|
|
<obj_property name="ElementShortName">es_mem_we</obj_property>
|
|
<obj_property name="ObjectShortName">es_mem_we</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/es_reg_we" type="logic">
|
|
<obj_property name="ElementShortName">es_reg_we</obj_property>
|
|
<obj_property name="ObjectShortName">es_reg_we</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/ms_reg_we" type="logic">
|
|
<obj_property name="ElementShortName">ms_reg_we</obj_property>
|
|
<obj_property name="ObjectShortName">ms_reg_we</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/src1_is_es_dest" type="logic">
|
|
<obj_property name="ElementShortName">src1_is_es_dest</obj_property>
|
|
<obj_property name="ObjectShortName">src1_is_es_dest</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/src1_is_ms_dest" type="logic">
|
|
<obj_property name="ElementShortName">src1_is_ms_dest</obj_property>
|
|
<obj_property name="ObjectShortName">src1_is_ms_dest</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/src2_is_es_dest" type="logic">
|
|
<obj_property name="ElementShortName">src2_is_es_dest</obj_property>
|
|
<obj_property name="ObjectShortName">src2_is_es_dest</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/src2_is_ms_dest" type="logic">
|
|
<obj_property name="ElementShortName">src2_is_ms_dest</obj_property>
|
|
<obj_property name="ObjectShortName">src2_is_ms_dest</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/forward/data_is_rf_wdata" type="logic">
|
|
<obj_property name="ElementShortName">data_is_rf_wdata</obj_property>
|
|
<obj_property name="ObjectShortName">data_is_rf_wdata</obj_property>
|
|
</wvobject>
|
|
</wvobject>
|
|
<wvobject fp_name="group215" type="group">
|
|
<obj_property name="label">div</obj_property>
|
|
<obj_property name="DisplayName">label</obj_property>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/div_clk" type="logic">
|
|
<obj_property name="ElementShortName">div_clk</obj_property>
|
|
<obj_property name="ObjectShortName">div_clk</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/reset" type="logic">
|
|
<obj_property name="ElementShortName">reset</obj_property>
|
|
<obj_property name="ObjectShortName">reset</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/div" type="logic">
|
|
<obj_property name="ElementShortName">div</obj_property>
|
|
<obj_property name="ObjectShortName">div</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/div_signed" type="logic">
|
|
<obj_property name="ElementShortName">div_signed</obj_property>
|
|
<obj_property name="ObjectShortName">div_signed</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/x" type="array">
|
|
<obj_property name="ElementShortName">x[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">x[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/y" type="array">
|
|
<obj_property name="ElementShortName">y[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">y[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/s" type="array">
|
|
<obj_property name="ElementShortName">s[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">s[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/r" type="array">
|
|
<obj_property name="ElementShortName">r[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">r[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/complete" type="logic">
|
|
<obj_property name="ElementShortName">complete</obj_property>
|
|
<obj_property name="ObjectShortName">complete</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/UnsignS" type="array">
|
|
<obj_property name="ElementShortName">UnsignS[32:0]</obj_property>
|
|
<obj_property name="ObjectShortName">UnsignS[32:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/UnsignR" type="array">
|
|
<obj_property name="ElementShortName">UnsignR[32:0]</obj_property>
|
|
<obj_property name="ObjectShortName">UnsignR[32:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/tmp_r" type="array">
|
|
<obj_property name="ElementShortName">tmp_r[32:0]</obj_property>
|
|
<obj_property name="ObjectShortName">tmp_r[32:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/count" type="array">
|
|
<obj_property name="ElementShortName">count[7:0]</obj_property>
|
|
<obj_property name="ObjectShortName">count[7:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/tmp_d" type="array">
|
|
<obj_property name="ElementShortName">tmp_d[32:0]</obj_property>
|
|
<obj_property name="ObjectShortName">tmp_d[32:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/result_r" type="array">
|
|
<obj_property name="ElementShortName">result_r[32:0]</obj_property>
|
|
<obj_property name="ObjectShortName">result_r[32:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/UnsignX" type="array">
|
|
<obj_property name="ElementShortName">UnsignX[32:0]</obj_property>
|
|
<obj_property name="ObjectShortName">UnsignX[32:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/UnsignY" type="array">
|
|
<obj_property name="ElementShortName">UnsignY[32:0]</obj_property>
|
|
<obj_property name="ObjectShortName">UnsignY[32:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/div_signed_buffer" type="logic">
|
|
<obj_property name="ElementShortName">div_signed_buffer</obj_property>
|
|
<obj_property name="ObjectShortName">div_signed_buffer</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/x_31_buffer" type="logic">
|
|
<obj_property name="ElementShortName">x_31_buffer</obj_property>
|
|
<obj_property name="ObjectShortName">x_31_buffer</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/y_31_buffer" type="logic">
|
|
<obj_property name="ElementShortName">y_31_buffer</obj_property>
|
|
<obj_property name="ObjectShortName">y_31_buffer</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/real_div_signed" type="logic">
|
|
<obj_property name="ElementShortName">real_div_signed</obj_property>
|
|
<obj_property name="ObjectShortName">real_div_signed</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/real_x_31" type="logic">
|
|
<obj_property name="ElementShortName">real_x_31</obj_property>
|
|
<obj_property name="ObjectShortName">real_x_31</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/real_y_31" type="logic">
|
|
<obj_property name="ElementShortName">real_y_31</obj_property>
|
|
<obj_property name="ObjectShortName">real_y_31</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/complete_delay" type="logic">
|
|
<obj_property name="ElementShortName">complete_delay</obj_property>
|
|
<obj_property name="ObjectShortName">complete_delay</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/real_complete" type="logic">
|
|
<obj_property name="ElementShortName">real_complete</obj_property>
|
|
<obj_property name="ObjectShortName">real_complete</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/TmpS" type="array">
|
|
<obj_property name="ElementShortName">TmpS[32:0]</obj_property>
|
|
<obj_property name="ObjectShortName">TmpS[32:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/u_div/TmpR" type="array">
|
|
<obj_property name="ElementShortName">TmpR[32:0]</obj_property>
|
|
<obj_property name="ObjectShortName">TmpR[32:0]</obj_property>
|
|
</wvobject>
|
|
</wvobject>
|
|
</wvobject>
|
|
<wvobject fp_name="group553" type="group">
|
|
<obj_property name="label">regfile</obj_property>
|
|
<obj_property name="DisplayName">label</obj_property>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/u_regfile/clk" type="logic">
|
|
<obj_property name="ElementShortName">clk</obj_property>
|
|
<obj_property name="ObjectShortName">clk</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/u_regfile/raddr1" type="array">
|
|
<obj_property name="ElementShortName">raddr1[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">raddr1[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/u_regfile/rdata1" type="array">
|
|
<obj_property name="ElementShortName">rdata1[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">rdata1[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/u_regfile/raddr2" type="array">
|
|
<obj_property name="ElementShortName">raddr2[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">raddr2[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/u_regfile/rdata2" type="array">
|
|
<obj_property name="ElementShortName">rdata2[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">rdata2[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/u_regfile/we" type="logic">
|
|
<obj_property name="ElementShortName">we</obj_property>
|
|
<obj_property name="ObjectShortName">we</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/u_regfile/waddr" type="array">
|
|
<obj_property name="ElementShortName">waddr[4:0]</obj_property>
|
|
<obj_property name="ObjectShortName">waddr[4:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/u_regfile/wdata" type="array">
|
|
<obj_property name="ElementShortName">wdata[31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">wdata[31:0]</obj_property>
|
|
</wvobject>
|
|
<wvobject fp_name="/cpu_tb/u_soc_top/cpu/id_stage/u_regfile/rf" type="array">
|
|
<obj_property name="ElementShortName">rf[31:0][31:0]</obj_property>
|
|
<obj_property name="ObjectShortName">rf[31:0][31:0]</obj_property>
|
|
</wvobject>
|
|
</wvobject>
|
|
</wave_config>
|