[Init] initialize repo

2023-05-11 12:33:10 +08:00
parent 7647279185
commit f86bda7b50
7 changed files with 37 additions and 0 deletions
--- a/vsrc/top.v
+++ b/vsrc/top.v
@@ -0,0 +1,6 @@
+module top (
+    input wire i_x,
+    output wire o_y
+);
+    assign o_y = i_x;
+endmodule