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[Modified] change div divu ip position form soc_top to exe_stage

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包焕垲
2023-06-06 11:30:52 +08:00
parent f660bd337b
commit df981a178c
3 changed files with 47 additions and 119 deletions
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63
lacpu/rtl/soc_lite_top.v
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@@ -33,24 +33,6 @@ module soc_lite_top
wire [31:0] cpu_data_addr;
wire [31:0] cpu_data_wdata;
wire [31:0] cpu_data_rdata;
//div
wire [31:0] div_divisor_data;
wire div_divisor_valid;
wire div_divisor_ready;
wire [31:0] div_dividend_data;
wire div_dividend_valid;
wire div_dividend_ready;
wire div_dout_valid;
wire [63:0] div_dout_data;
//divu
wire [31:0] divu_divisor_data;
wire divu_divisor_valid;
wire divu_divisor_ready;
wire [31:0] divu_dividend_data;
wire divu_dividend_valid;
wire divu_dividend_ready;
wire divu_dout_valid;
wire [63:0] divu_dout_data;
//cpu
mycpu_top cpu(
@@ -69,25 +51,6 @@ module soc_lite_top
.data_sram_wdata (cpu_data_wdata),
.data_sram_rdata (cpu_data_rdata),
//div
.div_divisor_data (div_divisor_data ),
.div_divisor_valid (div_divisor_valid ),
.div_divisor_ready (div_divisor_ready ),
.div_dividend_data (div_dividend_data ),
.div_dividend_valid (div_dividend_valid ),
.div_dividend_ready (div_dividend_ready ),
.div_dout_valid (div_dout_valid ),
.div_dout_data (div_dout_data ),
//divu
.divu_divisor_data (divu_divisor_data ),
.divu_divisor_valid (divu_divisor_valid ),
.divu_divisor_ready (divu_divisor_ready ),
.divu_dividend_data (divu_dividend_data ),
.divu_dividend_valid(divu_dividend_valid),
.divu_dividend_ready(divu_dividend_ready),
.divu_dout_valid (divu_dout_valid ),
.divu_dout_data (divu_dout_data ),
//debug
.debug_wb_pc (debug_wb_pc ),
.debug_wb_rf_wen (debug_wb_rf_wen ),
@@ -121,32 +84,6 @@ module soc_lite_top
.dina (cpu_data_wdata ), //31:0
.douta (cpu_data_rdata ) //31:0
);
//div
div div(
.aclk (cpu_clk ),
.s_axis_divisor_tdata (div_divisor_data ),
.s_axis_divisor_tvalid (div_divisor_valid ),
.s_axis_divisor_tready (div_divisor_ready ),
.s_axis_dividend_tdata (div_dividend_data ),
.s_axis_dividend_tvalid (div_dividend_valid ),
.s_axis_dividend_tready (div_dividend_ready ),
.m_axis_dout_tvalid (div_dout_valid ),
.m_axis_dout_tdata (div_dout_data )
);
//divu
divu divu(
.aclk (cpu_clk ),
.s_axis_divisor_tdata (divu_divisor_data ),
.s_axis_divisor_tvalid (divu_divisor_valid ),
.s_axis_divisor_tready (divu_divisor_ready ),
.s_axis_dividend_tdata (divu_dividend_data ),
.s_axis_dividend_tvalid (divu_dividend_valid),
.s_axis_dividend_tready (divu_dividend_ready),
.m_axis_dout_tvalid (divu_dout_valid ),
.m_axis_dout_tdata (divu_dout_data )
);
`endif
endmodule