From 9a72e27ca4158cc0b5c2d899277741ede7da9b3f Mon Sep 17 00:00:00 2001 From: UnbalancedCat Date: Tue, 23 May 2023 12:59:04 +0800 Subject: [PATCH] [Add] add div ip only (not use) --- .gitignore | 4 +- lacpu/rtl/xilinx_ip/div/div.xci | 161 ++++++++++++++++++++++++++++++ lacpu/rtl/xilinx_ip/divu/divu.xci | 155 ++++++++++++++++++++++++++++ 3 files changed, 318 insertions(+), 2 deletions(-) create mode 100644 lacpu/rtl/xilinx_ip/div/div.xci create mode 100644 lacpu/rtl/xilinx_ip/divu/divu.xci diff --git a/.gitignore b/.gitignore index cd8e1fe..66790eb 100644 --- a/.gitignore +++ b/.gitignore @@ -14,5 +14,5 @@ vivado.log !/lacpu/run_vivado/la32r/la32r.xpr !/lacpu/rtl/xilinx_ip/inst_ram/inst_ram.xci !/lacpu/rtl/xilinx_ip/data_ram/data_ram.xci -!/lacpu/rtl/xilinx_ip/data_ram/div.xci -!/lacpu/rtl/xilinx_ip/data_ram/divu.xci +!/lacpu/rtl/xilinx_ip/div/div.xci +!/lacpu/rtl/xilinx_ip/divu/divu.xci diff --git a/lacpu/rtl/xilinx_ip/div/div.xci b/lacpu/rtl/xilinx_ip/div/div.xci new file mode 100644 index 0000000..56b58f2 --- /dev/null +++ b/lacpu/rtl/xilinx_ip/div/div.xci @@ -0,0 +1,161 @@ + + + xilinx.com + xci + unknown + 1.0 + + + div + + + + 1000000 + 0 + 0.000 + 0 + + 100000000 + 0 + 0 + 0 + 0 + 0 + undef + 0.000 + 8 + 0 + 0 + 0 + + 100000000 + 0 + 0 + 1 + 0 + 0 + undef + 0.000 + 4 + 0 + 0 + 0 + + 100000000 + 0 + 0 + 1 + 0 + 0 + undef + 0.000 + 4 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 37 + 64 + 1 + 32 + 1 + 32 + 1 + 3 + 0 + artix7 + 8 + 32 + 32 + 0 + 32 + 1 + false + false + div + NonBlocking + Performance + Null + false + Radix2 + 8 + false + 32 + false + false + 1 + false + false + 1 + 32 + 32 + 37 + Automatic + Signed + Remainder + artix7 + + + xc7a100t + csg324 + VERILOG + + MIXED + -1 + + + TRUE + TRUE + IP_Flow + 16 + TRUE + . + + . + 2019.2 + OUT_OF_CONTEXT + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/lacpu/rtl/xilinx_ip/divu/divu.xci b/lacpu/rtl/xilinx_ip/divu/divu.xci new file mode 100644 index 0000000..c39ebbc --- /dev/null +++ b/lacpu/rtl/xilinx_ip/divu/divu.xci @@ -0,0 +1,155 @@ + + + xilinx.com + xci + unknown + 1.0 + + + divu + + + + 1000000 + 0 + 0.000 + 0 + + 100000000 + 0 + 0 + 0 + 0 + 0 + undef + 0.000 + 8 + 0 + 0 + 0 + + 100000000 + 0 + 0 + 1 + 0 + 0 + undef + 0.000 + 4 + 0 + 0 + 0 + + 100000000 + 0 + 0 + 1 + 0 + 0 + undef + 0.000 + 4 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 35 + 64 + 1 + 32 + 1 + 32 + 1 + 3 + 0 + artix7 + 8 + 32 + 32 + 0 + 32 + 0 + false + false + divu + NonBlocking + Performance + Null + false + Radix2 + 8 + false + 32 + false + false + 1 + false + false + 1 + 32 + 32 + 35 + Automatic + Unsigned + Remainder + artix7 + + + xc7a100t + csg324 + VERILOG + + MIXED + -1 + + + TRUE + TRUE + IP_Flow + 16 + TRUE + . + + . + 2019.2 + OUT_OF_CONTEXT + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +