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[Add] switch to 7-stage and pass func test

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包焕垲
2023-07-28 15:29:06 +08:00
parent bf2dd4655b
commit 3a070d35fc
12 changed files with 431 additions and 305 deletions
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6
lacpu/rtl/mycpu/mycpu_top.v
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@@ -90,8 +90,8 @@ module mycpu_top
assign resetn = aresetn;
// icache tag
wire icache_cached;
wire icache_uncached;
//wire icache_cached;
//wire icache_uncached;
wire icache_refresh;
wire icache_miss;
wire [31:0] icache_raddr;
@@ -204,7 +204,7 @@ module mycpu_top
.stallreq (stallreq_uncache ),
.conf_en (data_sram_en & ~dcache_cached ),
.conf_we (data_sram_we ),
.conf_addr (data_sram_addr_mmu ), // _mmu ?
.conf_addr (data_sram_addr_mmu ),
.conf_wdata (data_sram_wdata ),
.conf_rdata (uncache_temp_rdata ),
.axi_en (uncache_en ),